S. Couet

According to our database, S. Couet authored at least 29 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Soft and Hard Error-Correction Techniques in STT-MRAM.

Surendra Hemaram, Mehdi B. Tahoori, Francky Catthoor, Siddharth Rao, Sebastien Couet, Valerio Pica, Gouri Sankar Kar

IEEE Des. Test, October, 2024

Spintronic logic: from transducers to logic gates and circuits.

Christoph Adelmann, Florin Ciubotaru, Fanfan Meng, Sorin Cotofana, Sebastien Couet

CoRR, 2024

Extremely Scaled Perpendicular SOT-MRAM Array Integration on 300mm Wafer.

Farrukh Yasin, A. Palomino, A. Kumar, Valerio Pica, Simon Van Beek, Giacomo Talmelli, V. D. Nguyen, Stefan Cosemans, D. Crotti, Kurt Wostyn, Gouri Sankar Kar, Sebastien Couet

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

Testing STT-MRAMs: Do We Need Magnets in our Automated Test Equipment?

Sicong Yuan, Hanzhi Xun, Woojin Kim, Siddharth Rao, Erik Jan Marinissen, Sebastien Couet, Moritz Fieback, Mottaqiallah Taouil, Said Hamdioui

Proceedings of the IEEE International Test Conference, 2024

Novel Cross-Point Architecture utilizing Distributed Diode Selector for Read Margin Amplification.

Taras Ravsher, Andrea Fantini, Kruti Trivedi, Nouredine Rassoul, Harold Dekkers, Attilio Belmonte, Jan Van Houdt, Valeri Afanas'ev, Kurt Wostyn, Sebastien Couet, Gouri Sankar Kar

Proceedings of the IEEE International Memory Workshop, 2024

A novel test and analysis scheme to elucidate tail bit characteristics in STT-MRAM arrays.

W. Kim, Valerio Pica, N. Jossart, Farrukh Yasin, Kurt Wostyn, S. Couet, Sidharth Rao

Proceedings of the IEEE International Memory Workshop, 2024

Design-for-Test for Intermittent Faults in STT-MRAMs.

Sicong Yuan, Mohammad Amin Yaldagard, Hanzhi Xun, Moritz Fieback, Erik Jan Marinissen, Woojin Kim, Siddharth Rao, Sebastien Couet, Mottaqiallah Taouil, Said Hamdioui

Proceedings of the IEEE European Test Symposium, 2024

Hard Error Correction in STT-MRAM.

Surendra Hemaram, Mehdi B. Tahoori, Francky Catthoor, Siddharth Rao, Sebastien Couet, Gouri Sankar Kar

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023

Magnetic Coupling Based Test Development for Contact and Interconnect Defects in STT-MRAMs.

Sicong Yuan, Ziwei Zhang, Moritz Fieback, Hanzhi Xun, Erik Jan Marinissen, Gouri Sankar Kar, Sidharth Rao, Sebastien Couet, Mottaqiallah Taouil, Said Hamdioui

Proceedings of the IEEE International Test Conference, 2023

MTJ degradation in multi-pillar SOT-MRAM with selective writing.

Simon Van Beek, Kaiming Cai, Kaiquan Fan, Giacomo Talmelli, Anna Trovato, Nico Jossart, Siddharth Rao, Adrian Vaisman Chasin, Sebastien Couet

Proceedings of the IEEE International Reliability Physics Symposium, 2023

Spin-orbit torque MRAM for ultrafast cache and neuromorphic computing applications.

Siddharth Rao, Kaiming Cai, Giacomo Talmelli, Nathali Franchina-Vergel, Ward Janssens, Hubert Hody, Farrukh Yasin, Kurt Wostyn, Sebastien Couet

Proceedings of the IEEE International Memory Workshop, 2023

NPN Si/SiGe memory selector with non-linearity>10⁵ and ON-current>6MA/cm².

Gaspard Hiblot, Taras Ravsher, Roger Loo, Bhuvaneshwari Yengula Venkata Ramana, Nathali Franchina-Vergel, Andrea Fantini, Shamin Houshmand Sharifi, Nina Bazzazian, Kurt Wostyn, Loris Angelo Labbate, Sebastien Couet, Gouri Sankar Kar

Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

Magnetic Domain Wall Memory: A DTCO study for Memory Applications.

M. Gupta, Siddharth Rao, Gouri Sankar Kar, S. Couet

Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

STT-MRAM Stochastic and Defects-aware DTCO for Last Level Cache at Advanced Process Nodes.

Fernando García-Redondo, S. Rao, M. Gupta, Manu Perumkunnil, Y. Xiang, D. Abdi, Simon Van Beek, S. Couet, Marie Garcia Bardon

Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

Device-Aware Test for Back-Hopping Defects in STT-MRAMs.

Sicong Yuan, Mottaqiallah Taouil, Moritz Fieback, Hanzhi Xun, Erik Jan Marinissen, Gouri Sankar Kar, Sidharth Rao, Sebastien Couet, Said Hamdioui

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Device Aware Diagnosis for Unique Defects in STT-MRAMs.

Ahmed Aouichi, Sicong Yuan, Moritz Fieback, Siddharth Rao, Woojin Kim, Erik Jan Marinissen, Sebastien Couet, Mottaqiallah Taouil, Said Hamdioui

Proceedings of the 32nd IEEE Asian Test Symposium, 2023

2022

Challenges and targets of MRAM-enabled scaled spintronic logic circuits.

Fanfan Meng, Florin Ciubotaru, S.-Y. Lee, Odysseas Zografos, M. Gupta, V. D. Nguyen, Sebastien Couet, Gouri Sankar Kar, Giovanni De Micheli, Christoph Adelmann, I. Asselberghs

CoRR, 2022

Selective operations of multi-pillar SOT-MRAM for high density and low power embedded memories.

Kaiming Cai, Simon Van Beek, Siddharth Rao, K. Fan, M. Gupta, V. D. Nguyen, Ganesh Jayakumar, Giacomo Talmelli, S. Couet, Gouri Sankar Kar

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Degradation mechanism of amorphous IGZO-based bipolar metal-semiconductor-metal selectors.

Taras Ravsher, Andrea Fantini, Adrian Vaisman Chasin, Shamin H. Sharifi, Hubert Hody, Harold Dekkers, Thomas Witters, Jan Van Houdt, Valeri Afanas'ev, Sebastien Couet, Gouri Sankar Kar

Proceedings of the IEEE International Reliability Physics Symposium, 2022

MTJ degradation in SOT-MRAM by self-heating-induced diffusion.

Simon Van Beek, Kaiming Cai, Siddharth Rao, Ganesh Jayakumar, Sebastien Couet, Nico Jossart, Adrian Vaisman Chasin, Gouri Sankar Kar

Proceedings of the IEEE International Reliability Physics Symposium, 2022

2021

Solid state qubits: how learning from CMOS fabrication can speed-up progress in Quantum Computing.

Iuliana P. Radu, Roy Li, Anton Potocnik, Tsvetan Ivanov, Danny Wan, Stefan Kubicek, Nard I. Dumoulin Stuyck, Jeroen Verjauw, Julien Jussot, Yann Canvel, Clement Godfrin, Massimo Mongillo, Rohith Acharya, Asser Elsayed, Mohamed Shehata, Xiaoyu Piao, Antoine Pacco, Laurent Souriau, Sebastien Couet, B. T. Chan, Jan Craninckx, Bertrand Parvais, Alexander Grill, Subramanian Narasimhamoorthy, Steven Van Winckel, Steven Brebels, Fahd A. Mohiyaddin, George Simion, Bogdan Govoreanu

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

Edge-induced reliability & performance degradation in STT-MRAM: an etch engineering solution.

Simon Van Beek, Siddharth Rao, Shreya Kundu, Woojin Kim, Barry J. O'Sullivan, Stefan Cosemans, Farrukh Yasin, Robert Carpenter, Sebastien Couet, Shamin H. Sharifi, Nico Jossart, Davide Crotti, Gouri Sankar Kar

Proceedings of the IEEE International Reliability Physics Symposium, 2021

STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application.

Sidharth Rao, Woojin Kim, Simon Van Beek, Shreya Kundu, Manu Perumkunnil, Stefan Cosemans, Farrukh Yasin, Sebastien Couet, Robert Carpenter, Barry J. O'Sullivan, Shamin H. Sharifi, N. Jossart, Laurent Souriau, Ludovic Goux, Dimitri Crotti, Gouri Sankar Kar

Proceedings of the IEEE International Memory Workshop, 2021

2020

Understanding and empirical fitting the breakdown of MgO in end-of-line annealed MTJs.

Simon Van Beek, Barry J. O'Sullivan, Sebastien Couet, Davide Crotti, Dimitri Linten, Gouri Sankar Kar

Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019

Manufacturable 300mm platform solution for Field-Free Switching SOT-MRAM.

Kevin Garello, Farrukh Yasin, Hubert Hody, S. Couet, Laurent Souriau, Shamin H. Sharifi, Johan Swerts, Robert Carpenter, Sidharth Rao, Wonsub Kim, J. Wu, K. K. V. Sethu, M. Pak, N. Jossart, D. Crotti, Arnaud Furnémont, Gouri Sankar Kar

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

Pinhole Defect Characterization and Fault Modeling for STT-MRAM Testing.

Lizhou Wu, Siddharth Rao, Guilherme Cardoso Medeiros, Mottaqiallah Taouil, Erik Jan Marinissen, Farrukh Yasin, Sebastien Couet, Said Hamdioui, Gouri Sankar Kar

Proceedings of the 24th IEEE European Test Symposium, 2019

2018

SOT-MRAM 300mm integration for low power and ultrafast embedded memories.

Kevin Garello, Farrukh Yasin, S. Couet, Laurent Souriau, Johan Swerts, Sidharth Rao, Simon Van Beek, Wonsub Kim, Enlong Liu, Shreya Kundu, Diana Tsvetanova, N. Jossart, Kris Croes, E. Grimaldi, M. Baumgartner, D. Crotti, Arnaud Furnémont, Pietro Gambardella, Gouri Sankar Kar

CoRR, 2018

SOT-MRAM 300MM Integration for Low Power and Ultrafast Embedded Memories.

Kevin Garello, Kevin Garello Yasin, S. Couet, Laurent Souriau, Johan Swerts, Sidharth Rao, Simon Van Beek, Wonsub Kim, Enlong Liu, Shreya Kundu, Diana Tsvetanova, Kris Croes, N. Jossart, E. Grimaldi, M. Baumgartner, D. Crotti, Arnaud Fumemont, Pietro Gambardella, Gouri Sankar Kar

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Extended RVS characterisation of STT-MRAM devices: Enabling detection of AP/P switching and breakdown.

Barry J. O'Sullivan, Simon Van Beek, Philippe J. Roussel, Sidharth Rao, Wonsub Kim, S. Couet, Johan Swerts, Farrukh Yasin, Dimitri Crotti, Dimitri Linten, Gouri Sankar Kar

Proceedings of the IEEE International Reliability Physics Symposium, 2018