Ryutaro Doi
Orcid: 0000-0001-5011-627X
According to our database1,
Ryutaro Doi
authored at least 10 papers
between 2016 and 2020.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2020
Sneak Path Free Reconfiguration With Minimized Programming Steps for Via-Switch Crossbar-Based FPGA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2020
33.3 Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for Al Applications.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2018
Via-Switch FPGA: Highly Dense Mixed-Grained Reconfigurable Architecture With Overlay Via-Switch Crossbars.
IEEE Trans. Very Large Scale Integr. Syst., 2018
An analytic evaluation on soft error immunity enhancement due to temporal triplication.
Int. J. Embed. Syst., 2018
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the International Conference on Computer-Aided Design, 2018
2016
A highly-dense mixed grained reconfigurable architecture with overlay crossbar interconnect using via-switch.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016