Ryszard Szplet

According to our database, Ryszard Szplet authored at least 16 papers between 2000 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

A brief review of wave union TDCs.

Pawel Kwiatkowski, Dominik Sondej, Ryszard Szplet

Proceedings of the 7th International Conference on Event-Based Control, 2021

2020

Efficient Implementation of Multiple Time Coding Lines-Based TDC in an FPGA Device.

Pawel Kwiatkowski, Ryszard Szplet

IEEE Trans. Instrum. Meas., 2020

Multisampling wave union time-to-digital converter.

Pawel Kwiatkowski, Ryszard Szplet

Proceedings of the 6th International Conference on Event-Based Control, 2020

2019

Measurement Uncertainty of Precise Interpolating Time Counters.

Ryszard Szplet, Rafal Szymanowski, Dominik Sondej

IEEE Trans. Instrum. Meas., 2019

A 9 ps time interval digitizer based on pulse repetition and averaging.

Ryszard Szplet, Slawomir Jarzynski

Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2019

Time-to-Digital Converter with Pseudo-Segmented Delay Line.

Pawel Kwiatkowski, Ryszard Szplet

Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2019

2018

Digital-to-time converter with pulse train generation capability.

Pawel Kwiatkowski, Ryszard Szplet

Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2018

2017

Four-channel, precise, time-event recorder in programmable device.

Ryszard Szplet, Pawel Kwiatkowski, Zbigniew Jachna, Krzysztof Rozyc

Proceedings of the 3rd International Conference on Event-Based Control, 2017

2016

High-Precision Time Digitizer Based on Multiedge Coding in Independent Coding Lines.

Ryszard Szplet, Dominik Sondej, Grzegorz Grzeda

IEEE Trans. Instrum. Meas., 2016

An Eight-Channel 4.5-ps Precision Timestamps-Based Time Interval Counter in FPGA Chip.

Ryszard Szplet, Pawel Kwiatkowski, Zbigniew Jachna, Krzysztof Rozyc

IEEE Trans. Instrum. Meas., 2016

A time digitizer based on multiphase clock implemented in FPGA device.

Pawel Kwiatkowski, Ryszard Szplet, Zbigniew Jachna, Krzysztof Rozyc

Proceedings of the Second International Conference on Event-based Control, 2016

2015

A comparison of methods for time-to-digital conversion based on independent coding lines and multi-edge coding.

Dominik Sondej, Ryszard Szplet

Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

2014

Subpicosecond-resolution time-to-digital converter with multi-edge coding in independent coding lines.

Ryszard Szplet, Dominik Sondej, Grzegorz Grzeda

Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2014

A combination of multi-edge coding and independent coding lines for time-to-digital conversion.

Dominik Sondej, Ryszard Szplet

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2010

An FPGA-Integrated Time-to-Digital Converter Based on Two-Stage Pulse Shrinking.

Ryszard Szplet, Kamil Klepacki

IEEE Trans. Instrum. Meas., 2010

2000

Interpolating time counter with 100 ps resolution on a single FPGA device.

Ryszard Szplet, Józef Kalisz, Rafal Szymanowski

IEEE Trans. Instrum. Meas., 2000