Ryan Kastner

ACM Trans. Reconfigurable Technol. Syst., March, 2024

CGRA4ML: A Framework to Implement Modern Neural Networks for Scientific Edge Computing.

[BibT_eX]

[DOI]

CoRR, 2024

Architectural Implications of Neural Network Inference for High Data-Rate, Low-Latency Scientific Applications.

[BibT_eX]

[DOI]

Olivia Weng

Alexander Redding

Nhan Tran

Ashwin Rohit Alagiri Rajan

CoRR, 2024

Reliable edge machine learning hardware for scientific applications.

[BibT_eX]

[DOI]

Proceedings of the 42nd IEEE VLSI Test Symposium, 2024

Reducing the Carbon Footprint of EdTech with Repurposed Devices.

[BibT_eX]

[DOI]

Jennifer Switzer

Subash Katel

Jaemok Christian Lee

Pat Pannuto

Proceedings of the 15th IEEE International Green and Sustainable Computing Conference, 2024

Pentimento: Data Remanence in Cloud FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023

Isadora: automated information-flow property generation for hardware security verification.

[BibT_eX]

[DOI]

J. Cryptogr. Eng., November, 2023

A Framework for Design, Verification, and Management of SoC Access Control Systems.

[BibT_eX]

[DOI]

IEEE Trans. Computers, February, 2023

Security Verification of the OpenTitan Hardware Root of Trust.

[BibT_eX]

[DOI]

IEEE Secur. Priv., 2023

Information Flow Coverage Metrics for Hardware Security Verification.

[BibT_eX]

[DOI]

CoRR, 2023

Tailor: Altering Skip Connections for Resource-Efficient Inference.

[BibT_eX]

[DOI]

CoRR, 2023

Special Session: CAD for Hardware Security - Promising Directions for Automation of Security Assurance.

[BibT_eX]

[DOI]

Jasper Van Woudenberg

Proceedings of the 41st IEEE VLSI Test Symposium, 2023

Adapting Skip Connections for Resource-Efficient FPGA Inference.

[BibT_eX]

[DOI]

Alejandro Linares-Barranco

Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

Turn on, Tune in, Listen up: Maximizing Side-Channel Recovery in Time-to-Digital Converters.

[BibT_eX]

[DOI]

Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

Within-Camera Multilayer Perceptron DVS Denoising.

[BibT_eX]

[DOI]

Thea Aarrestad

Tobi Delbrück

Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023

Automated Generation, Verification, and Ranking of Secure SoC Access Control Policies.

[BibT_eX]

[DOI]

Proceedings of Cyber-Physical Systems and Internet of Things Week 2023, 2023

Junkyard Computing: Repurposing Discarded Smartphones to Minimize Carbon.

[BibT_eX]

[DOI]

Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2022

Sherlock: A Multi-Objective Design Space Exploration Framework.

[BibT_eX]

[DOI]

Quentin Gautier

Christopher L. Crutchfield

ACM Trans. Design Autom. Electr. Syst., 2022

Cut and Forward: Safe and Secure Communication for FPGA System on Chips.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

ARTe: Providing real-time multitasking to Arduino.

[BibT_eX]

[DOI]

J. Syst. Softw., 2022

Toward Hardware Security Property Generation at Scale.

[BibT_eX]

[DOI]

IEEE Secur. Priv., 2022

Renée: New Life for Old Phones.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., 2022

A Remote Control System for Emergency Ventilators During SARS-CoV-2.

[BibT_eX]

[DOI]

Michael Barrow

Enrico Rossi

IEEE Embed. Syst. Lett., 2022

Hardware Information Flow Tracking.

[BibT_eX]

[DOI]

Christopher L. Crutchfield

ACM Comput. Surv., 2022

Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark.

[BibT_eX]

[DOI]

Hendrik Borras

Giuseppe Di Guglielmo

CoRR, 2022

Underwater Depth Calibration Using a Commercial Depth Camera.

[BibT_eX]

[DOI]

Emily Wong

Isabella Humphrey

Scott Switzer

Nathan T. Hui

Curt Schurgers

Proceedings of the WUWNet 2022: The 16th International Conference on Underwater Networks & Systems, 2022

Automating hardware security property generation: invited.

[BibT_eX]

[DOI]

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Integrating Information Flow Tracking into High-Level Synthesis Design Flow.

[BibT_eX]

[DOI]

Lingjuan Wu

Behavioral Synthesis for Hardware Security, 2022

2021

$O(N)$O(N)-Space Spatiotemporal Filter for Reducing Noise in Neuromorphic Vision Sensors.

[BibT_eX]

[DOI]

Alireza Khodamoradi

IEEE Trans. Emerg. Top. Comput., 2021

An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

A more precise way to localize animals using drones.

[BibT_eX]

[DOI]

J. Field Robotics, 2021

Applications and Techniques for Fast Machine Learning in Science.

[BibT_eX]

[DOI]

Allison McCarn Deiana

Nhan Tran

Joshua Agar

Michaela Blott

Giuseppe Di Guglielmo

Tomás E. Müller-Bravo

Seyedramin Rasoulinezhad

Maria Domenica Galati

Mohammed Attia Mohammed

Subramanian Ramamoorthy

CoRR, 2021

Architecture of a Junkyard Datacenter.

[BibT_eX]

[DOI]

Jennifer Switzer

Pat Pannuto

CoRR, 2021

AKER: A Design and Verification Framework for Safe andSecure SoC Access Control.

[BibT_eX]

[DOI]

CoRR, 2021

A Methodology For Creating Information Flow Specifications of Hardware Designs.

[BibT_eX]

[DOI]

CoRR, 2021

Hardware-efficient Residual Networks for FPGAs.

[BibT_eX]

[DOI]

Olivia Weng

Alireza Khodamoradi

CoRR, 2021

Special Session: CAD for Hardware Security - Automation is Key to Adoption of Solutions.

[BibT_eX]

[DOI]

Proceedings of the 39th IEEE VLSI Test Symposium, 2021

Pyrenote: a Web-based, Manual Annotation Tool for Passive Acoustic Monitoring.

[BibT_eX]

[DOI]

Proceedings of the IEEE 18th International Conference on Mobile Ad Hoc and Smart Systems, 2021

ASLR: An Adaptive Scheduler for Learning Rate.

[BibT_eX]

[DOI]

Proceedings of the International Joint Conference on Neural Networks, 2021

Aker: A Design and Verification Framework for Safe and Secure SoC Access Control.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

iSTELLAR: intermittent Signature aTtenuation Embedded CRYPTO with Low-Level metAl Routing.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

S2N2: A FPGA Accelerator for Streaming Spiking Neural Networks.

[BibT_eX]

[DOI]

Alireza Khodamoradi

Kristof Denolf

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

Classifying Computations on Multi-Tenant FPGAs.

[BibT_eX]

[DOI]

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

A Tunable Dual-Edge Time-to-Digital Converter.

[BibT_eX]

[DOI]

Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

Classifying Computations on Multi-Tenant FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Isadora: Automated Information Flow Property Generation for Hardware Designs.

[BibT_eX]

[DOI]

Proceedings of the ASHES@CCS 2021: Proceedings of the 5th Workshop on Attacks and Solutions in Hardware Security, 2021

2020

Memory-Based High-Level Synthesis Optimizations Security Exploration on the Power Side-Channel.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

A Unified Model for Gate Level Propagation Analysis.

[BibT_eX]

[DOI]

Jeremy Blackstone

Lu Zhang

CoRR, 2020

Patient Specific Biomechanics Are Clinically Significant In Accurate Computer Aided Surgical Image Guidance.

[BibT_eX]

[DOI]

CoRR, 2020

Real-time Automatic Modulation Classification using RFSoC.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

2019

Introduction to the Special Section on Security in FPGA-accelerated Cloud and Datacenters.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2019

D-SEA: The Underwater Depth Sensing Device for Standalone Time-Averaged Measurements.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Conference on Mobile Ad Hoc and Sensor Systems Workshops, 2019

Benchmarking Video with the Surgical Image Registration Generator (SIRGn) Baseline.

[BibT_eX]

[DOI]

Proceedings of the Advances in Visual Computing, 2019

FastWave: Accelerating Autoregressive Convolutional Neural Networks on FPGA.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2019

Holistic Power Side-Channel Leakage Assessment: Towards a Robust Multidimensional Metric.

[BibT_eX]

[DOI]

Jeremy Blackstone

Proceedings of the International Conference on Computer-Aided Design, 2019

VeriSketch: Synthesizing Secure Hardware Designs with Timing-Sensitive Information Flow Properties.

[BibT_eX]

[DOI]

Yoshiki Takashima

Sicun Gao

Proceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security, 2019

FPGA Architectures for Real-time Dense SLAM.

[BibT_eX]

[DOI]

Quentin Gautier

Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018

Synthesizable Higher-Order Functions for C++.

[BibT_eX]

[DOI]

Dustin Richmond

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Quantitative Analysis of Timing Channel Security in Cryptographic Hardware Design.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

A hardware accelerated system for high throughput cellular image analysis.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2018

Parallel Programming for FPGAs.

[BibT_eX]

[DOI]

Janarbek Matai

Stephen Neuendorffer

CoRR, 2018

Symbolic execution based test-patterns generation algorithm for hardware Trojan detection.

[BibT_eX]

[DOI]

Comput. Secur., 2018

Self-Localization of a Deforming Swarm of Underwater Vehicles Using Impulsive Sound Sources of Opportunity.

[BibT_eX]

[DOI]

IEEE Access, 2018

Hiding Intermittent Information Leakage with Architectural Support for Blinking.

[BibT_eX]

[DOI]

Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018

Property specific information flow analysis for hardware security verification.

[BibT_eX]

[DOI]

Xinmu Wang

Proceedings of the International Conference on Computer-Aided Design, 2018

Everyone's a Critic: A Tool for Exploring RISC-V Projects.

[BibT_eX]

[DOI]

Dustin Richmond

Michael Barrow

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

A FPGA Accelerator for Real-Time 3D Non-rigid Registration Using Tree Reweighted Message Passing and Dynamic Markov Random Field Generation.

[BibT_eX]

[DOI]

Michael Barrow

Steven M. Burns

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

Examining the consequences of high-level synthesis optimizations on power side-channel.

[BibT_eX]

[DOI]

Lu Zhang

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

PynqCopter - An Open-source FPGA Overlay for UAVs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Big Data (IEEE BigData 2018), 2018

2017

Identifying and Measuring Security Critical Path for Uncovering Circuit Vulnerabilities.

[BibT_eX]

[DOI]

Proceedings of the 18th International Workshop on Microprocessor and SOC Test and Verification, 2017

Radio receiver design for Unmanned Aerial wildlife tracking.

[BibT_eX]

[DOI]

Proceedings of the 2017 International Conference on Computing, 2017

A streaming clustering approach using a heterogeneous system for big data analysis.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Why you should care about don't cares: Exploiting internal don't care conditions for hardware Trojans.

[BibT_eX]

[DOI]

Lu Zhang

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Clepsydra: Modeling timing flows in hardware designs.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

[BibT_eX]

[DOI]

Joshua Marxen

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Arbitrary Precision and Complexity Tradeoffs for Gate-Level Information Flow Tracking.

[BibT_eX]

[DOI]

Proceedings of the 54th Annual Design Automation Conference, 2017

An Architecture for Learning Stream Distributions with Application to RNG Testing.

[BibT_eX]

[DOI]

Proceedings of the 54th Annual Design Automation Conference, 2017

A message from the general chair and program chair.

[BibT_eX]

[DOI]

Ken Eguro

Proceedings of the 28th IEEE International Conference on Application-specific Systems, 2017

2016

Detecting Hardware Trojans with Gate-Level Information-Flow Tracking.

[BibT_eX]

[DOI]

Computer, 2016

Autonomous acoustic trigger for distributed underwater visual monitoring systems.

[BibT_eX]

[DOI]

Proceedings of the 11th ACM International Conference on Underwater Networks & Systems, 2016

Detection and time-of-arrival estimation of underwater acoustic signals.

[BibT_eX]

[DOI]

Roee Diamant

Michele Zorzi

Proceedings of the 17th IEEE International Workshop on Signal Processing Advances in Wireless Communications, 2016

Towards Property Driven Hardware Security.

[BibT_eX]

[DOI]

Proceedings of the 17th International Workshop on Microprocessor and SOC Test and Verification, 2016

Imprecise security: quality and complexity tradeoffs for hardware information flow tracking.

[BibT_eX]

[DOI]

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Spector: An OpenCL FPGA benchmark suite.

[BibT_eX]

[DOI]

Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

Resolve: Generation of High-Performance Sorting Architectures from High-Level Synthesis.

[BibT_eX]

[DOI]

Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

Tinker: Generating Custom Memory Architectures for Altera's OpenCL Compiler.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

Adaptive Threshold Non-Pareto Elimination: Re-thinking machine learning for system level design space exploration on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Composable, parameterizable templates for high-level synthesis.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Quantifying hardware security using joint information flow analysis.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

RIFFA 2.1: A Reusable Integration Framework for FPGA Accelerators.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2015

ToA-TS: Time of arrival based joint time synchronization and tracking for mobile underwater systems.

[BibT_eX]

[DOI]

Ad Hoc Networks, 2015

Real-time collaborative tracking for underwater networked systems.

[BibT_eX]

[DOI]

Ad Hoc Networks, 2015

Scaling the Annotation of Subtidal Marine Habitats.

[BibT_eX]

[DOI]

Proceedings of the 10th International Conference on Underwater Networks & Systems, 2015

Quantifying Timing-Based Information Flow in Cryptographic Hardware.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

A scalable FPGA architecture for nonnegative least squares problems.

[BibT_eX]

[DOI]

Gilberto Antonio Marcon dos Santos

Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2014

Gate-Level Information Flow Tracking for Security Lattices.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2014

Leveraging Gate-Level Properties to Identify Hardware Timing Channels.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Networks on Chip with Provable Security Properties.

[BibT_eX]

[DOI]

IEEE Micro, 2014

Enabling FPGAs for the Masses.

[BibT_eX]

[DOI]

CoRR, 2014

Small Unmanned Aerial Vehicle System for Wildlife Radio Collar Tracking.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE International Conference on Mobile Ad Hoc and Sensor Systems, 2014

Real-time 3D reconstruction for FPGAs: A case study for evaluating the performance, area, and programmability trade-offs of the Altera OpenCL SDK.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

Hardware accelerated novel optical de novo assembly for large-scale genomes.

[BibT_eX]

[DOI]

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

High throughput channel tracking for JTRS wireless channel emulation.

[BibT_eX]

[DOI]

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Improving FPGA accelerated tracking with multiple online trained classifiers.

[BibT_eX]

[DOI]

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

FPGA Accelerated Online Boosting for Multi-target Tracking.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

Sapper: a language for hardware-level security policy enforcement.

[BibT_eX]

[DOI]

Vasanth Ram Rajarathinam

Proceedings of the Architectural Support for Programming Languages and Operating Systems, 2014

Energy efficient canonical huffman encoding.

[BibT_eX]

[DOI]

Janarbek Matai

Joo-Young Kim

Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014

2013

A 3-D Split Manufacturing Approach to Trustworthy System Development.

[BibT_eX]

[DOI]

Jonathan Valamehr

David Marangoni-Simonsen

Ted Huffmire

Cynthia E. Irvine

Timothy E. Levin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

A software-based dynamic-warp scheduling approach for load-balancing the Viola-Jones face detection algorithm on GPUs.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2013

Design of a Reconfigurable Acoustic Modem for Underwater Sensor Networks.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

Expanding Gate Level Information Flow Tracking for Multilevel Security.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., 2013

Eliminating Timing Information Flows in a Mix-Trusted System-on-Chip.

[BibT_eX]

[DOI]

Jason Oberg

IEEE Des. Test, 2013

Joint time synchronization and tracking for mobile underwater systems.

[BibT_eX]

[DOI]

Proceedings of the Conference on Underwater Networks and Systems, 2013

Position paper: Sapper - a language for provable hardware policy enforcement.

[BibT_eX]

[DOI]

Vasanth Ram Rajarathinam

Proceedings of the 2013 ACM SIGPLAN Workshop on Programming Languages and Analysis for Security, 2013

SurfNoC: a low latency and provably non-interfering approach to secure networks-on-chip.

[BibT_eX]

[DOI]

Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013

A low-power Adaboost-based object detection processor using Haar-like features.

[BibT_eX]

[DOI]

Proceedings of the IEEE Third International Conference on Consumer Electronics, 2013

A FPGA design for high speed feature extraction from a compressed measurement stream.

[BibT_eX]

[DOI]

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

A hardware accelerated approach for imaging flow cytometry.

[BibT_eX]

[DOI]

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

RIFFA 2.0: A reusable integration framework for FPGA accelerators.

[BibT_eX]

[DOI]

Matthew Jacobsen

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

A practical testing framework for isolating hardware timing channels.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

2012

On the Complexity of Generating Gate Level Information Flow Tracking Logic.

[BibT_eX]

[DOI]

IEEE Trans. Inf. Forensics Secur., 2012

Designing an Adaptive Acoustic Modem for Underwater Sensor Networks.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., 2012

Real-time collaborative tracking for underwater networked systems.

[BibT_eX]

[DOI]

Diba Mirza

Curt Schurgers

Proceedings of the Conference on Under Water Networks, 2012

Simultaneous information flow security and circuit redundancy in Boolean gates.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Circuit Primitives for Monitoring Information Flow and Enabling Redundancy.

[BibT_eX]

[DOI]

Proceedings of the Hardware and Software: Verification and Testing, 2012

Sensor platforms for multimodal underwater monitoring.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Green Computing Conference, 2012

FPGA-GPU-CPU heterogenous architecture for real-time cardiac physiological optical mapping.

[BibT_eX]

[DOI]

Pingfan Meng

Matthew Jacobsen

Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

Designing a hardware in the loop wireless digital channel emulator for software defined radio.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

RIFFA: A Reusable Integration Framework for FPGA Accelerators.

[BibT_eX]

[DOI]

Matthew Jacobsen

Yoav Freund

Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

GPU acceleration of optical mapping algorithm for cardiac electrophysiology.

[BibT_eX]

[DOI]

Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

A Qualitative Security Analysis of a New Class of 3-D Integrated Crypto Co-processors.

[BibT_eX]

[DOI]

Proceedings of the Cryptography and Security: From Theory to Applications, 2012

2011

Integrating Embedded Computing Systems Into High School and Early Undergraduate Education.

[BibT_eX]

[DOI]

IEEE Trans. Educ., 2011

Simulate and Eliminate: A Top-to-Bottom Design Methodology for Automatic Generation of Application Specific Architectures.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Theoretical Fundamentals of Gate Level Information Flow Tracking.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security.

[BibT_eX]

[DOI]

Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

Design and Implementation of an FPGA-Based Real-Time Face Recognition System.

[BibT_eX]

[DOI]

Janarbek Matai

Ali Irturk

Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

Information flow isolation in I2C and USB.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

JBoost Optimization of Color Detectors for Autonomous Underwater Vehicle Navigation.

[BibT_eX]

[DOI]

Christopher Barngrover

Serge J. Belongie

Proceedings of the Computer Analysis of Images and Patterns, 2011

2010

Security Primitives for Reconfigurable Hardware-Based Systems.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2010

GUSTO: An automatic generation and optimization tool for matrix inversion architectures.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2010

Layout Aware Optimization of High Speed Fixed Coefficient FIR Filters for FPGAs.

[BibT_eX]

[DOI]

Shahnam Mirzaei

Int. J. Reconfigurable Comput., 2010

Design of a Low-Cost Underwater Acoustic Modem.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., 2010

R&D of a dual mode acoustic modem testbed for shallow water channels.

[BibT_eX]

[DOI]

Proceedings of the Workshop on Underwater Networks, 2010

Channel Equalization Based on Data Reuse LMS Algorithm for Shallow Water Acoustic Communication.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Sensor Networks, 2010

Hardware Implementation of Symbol Synchronization for Underwater FSK.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Sensor Networks, 2010

Field Programmable Gate Array Implementation of Parts-Based Object Detection for Real Time Video Applications.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Accelerating Viola-Jones Face Detection to FPGA-Level Using GPUs.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

Increased Performace of FPGA-Based Color Classification System.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

Theoretical analysis of gate level information flow tracking.

[BibT_eX]

[DOI]

Proceedings of the 47th Design Automation Conference, 2010

Hardware trust implications of 3-D integration.

[BibT_eX]

[DOI]

Proceedings of the 5th Workshop on Embedded Systems Security, 2010

Hardware assistance for trustworthy systems through 3-D integration.

[BibT_eX]

[DOI]

Proceedings of the Twenty-Sixth Annual Computer Security Applications Conference, 2010

2009

Architectural optimization of decomposition algorithms for wireless communication systems.

[BibT_eX]

[DOI]

Proceedings of the 2009 IEEE Wireless Communications and Networking Conference, 2009

Hardware acceleration of multi-view face detection.

[BibT_eX]

[DOI]

Junguk Cho

Bridget Benson

Proceedings of the IEEE 7th Symposium on Application Specific Processors, 2009

Energy benefits of reconfigurable hardware for use in underwater sensor nets.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Fpga-based face detection system using Haar classifiers.

[BibT_eX]

[DOI]

Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

Bit Error Rate, Power and Area Analysis of Multiple FPGA Implementations of Underwater FSK.

[BibT_eX]

Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2009

Xquasher: a tool for efficient computation of multiple linear expressions.

[BibT_eX]

[DOI]

Proceedings of the 46th Design Automation Conference, 2009

Parallelized Architecture of Multiple Classifiers for Face Detection.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Conference on Application-Specific Systems, 2009

2008

Designing secure systems on reconfigurable hardware.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2008

Managing Security in FPGA-Based Embedded Systems.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2008

Enforcing memory policy specifications in reconfigurable hardware.

[BibT_eX]

[DOI]

Comput. Secur., 2008

An FPGA Design Space Exploration Tool for Matrix Inversion Architectures.

[BibT_eX]

[DOI]

Proceedings of the IEEE Symposium on Application Specific Processors, 2008

Survey of hardware platforms for an energy efficient implementation of matching pursuits algorithm for shallow water networks.

[BibT_eX]

[DOI]

Proceedings of the Third Workshop on Underwater Networks, 2008

Trustworthy System Security through 3-D Integrated Hardware.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2008

Automatic generation of decomposition based matrix inversion architectures.

[BibT_eX]

[DOI]

Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

Threats and Challenges in Reconfigurable Hardware Security.

[BibT_eX]

Ted Huffmire

Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008

Design space exploration of a cooperative MIMO receiver for reconfigurable architectures.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008

2007

Algebraic Methods for Optimizing Constant Multiplications in Linear Systems.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 2007

Exploring time/resource trade-offs by solving dual scheduling problems with the ant colony optimization.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2007

Ant Colony Optimizations for Resource- and Timing-Constrained Operation Scheduling.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Implementation of the Alamouti OSTBC to a Distributed Set of Single-Antenna Wireless Nodes.

[BibT_eX]

[DOI]

Proceedings of the IEEE Wireless Communications and Networking Conference, 2007

Moats and Drawbridges: An Isolation Primitive for Reconfigurable Hardware Based Systems.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE Symposium on Security and Privacy (S&P 2007), 2007

A pageable, defect-tolerant nanoscale memory system.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE International Symposium on Nanoscale Architectures, 2007

Combining static and dynamic defect-tolerance techniques for nanoscale memory systems.

[BibT_eX]

[DOI]

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2006

Statistical Analysis and Design of HARP FPGAs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Optimizing Polynomial Expressions by Algebraic Factorization and Common Subexpression Elimination.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Application partitioning on programmable platforms using the ant colony optimization.

[BibT_eX]

[DOI]

J. Embed. Comput., 2006

Design of a low-cost acoustic modem for moored oceanographic applications.

[BibT_eX]

[DOI]

Proceedings of the First Workshop on Underwater Networks, WUWNET 2006, Los Angeles, CA, 2006

FPGA Implementation of High Speed FIR Filters Using Add and Shift Method.

[BibT_eX]

[DOI]

Shahnam Mirzaei

Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006

On the use of Bloom filters for defect maps in nanocomputing.

[BibT_eX]

[DOI]

Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Carrier Offset and Channel Estimation for Cooperative MIMO Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the Global Telecommunications Conference, 2006. GLOBECOM '06, San Francisco, CA, USA, 27 November, 2006

High speed FIR filter implementation using add and shift method.

[BibT_eX]

[DOI]

Shahnam Mirzaei

Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, 2006

Defect-Tolerant Nanocomputing Using Bloom Filters.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

Policy-Driven Memory Protection for Reconfigurable Hardware.

[BibT_eX]

[DOI]

Proceedings of the Computer Security, 2006

Layout driven data communication optimization for high level synthesis.

[BibT_eX]

[DOI]

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Optimizing high speed arithmetic circuits using three-term extraction.

[BibT_eX]

[DOI]

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Design space exploration using time and resource duality with the ant colony optimization.

[BibT_eX]

[DOI]

Proceedings of the 43rd Design Automation Conference, 2006

Leakage power reduction of embedded memories on FPGAs through location assignment.

[BibT_eX]

[DOI]

Yan Meng

Proceedings of the 43rd Design Automation Conference, 2006

2005

A scheduling algorithm for optimization and early planning in high-level synthesis.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2005

Exploring the limits of leakage power reduction in caches.

[BibT_eX]

[DOI]

Yan Meng

ACM Trans. Archit. Code Optim., 2005

Algorithm/Architecture Co-exploration for Designing Energy Efficient Wireless Channel Estimator.

[BibT_eX]

[DOI]

J. Low Power Electron., 2005

Energy Efficient Hardware Synthesis of Polynomial Expressions.

[BibT_eX]

[DOI]

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Efficient distributed algorithms for data fusion and node localization in mobile ad-hoc networks.

[BibT_eX]

[DOI]

Andrew P. Brown

Ronald A. Iltis

Proceedings of the IEEE 2nd International Conference on Mobile Adhoc and Sensor Systems, 2005

Storage assignment during high-level synthesis for configurable architectures.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

On the Limits of Leakage Power Reduction in Caches.

[BibT_eX]

[DOI]

Yan Meng

Proceedings of the 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 2005

Instruction scheduling using <i>MAX-MIN</i> ant system optimization.

[BibT_eX]

[DOI]

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

HARP: hard-wired routing pattern FPGAs.

[BibT_eX]

[DOI]

Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

Data Partitioning and Optimizations for Reconfigurable Architectures.

[BibT_eX]

Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005

MP core: algorithm and design techniques for efficient channel estimation in wireless applications.

[BibT_eX]

[DOI]

Proceedings of the 42nd Design Automation Conference, 2005

Reducing hardware complexity of linear DSP systems by iteratively eliminating two-term common subexpressions.

[BibT_eX]

[DOI]

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Timing driven gate duplication.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2004

Factoring and eliminating common subexpressions in polynomial expressions.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

A High Performance Application Representation for Reconfigurable Systems.

[BibT_eX]

Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

Common Subexpression Elimination Involving Multiple Variables for Linear DSP Synthesis.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International Conference on Application-Specific Systems, 2004

2003

Congestion reduction during placement with provably good approximation bound.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2003

Creating and exploiting flexibility in rectilinear Steiner trees.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Data communication estimation and reduction for reconfigurable systems.

[BibT_eX]

[DOI]

Adam Kaplan

Philip Brisk

Proceedings of the 40th Design Automation Conference, 2003

2002

Instruction generation for hybrid reconfigurable systems.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2002

Congestion estimation during top-down placement.

[BibT_eX]

[DOI]

Xiaojian Yang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

Pattern routing: use and theory for increasing predictability andavoiding coupling.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

On the Sensitivity of Incremental Algorithms for Combinatorial Auctions.

[BibT_eX]

[DOI]

Proceedings of the Fourth IEEE International Workshop on Advanced Issues of E-Commerce and Web-Based Information Systems (WECWIS'02), 2002

Instruction generation and regularity extraction for reconfigurable processors.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Compilers, 2002

2001

On the complexity of gate duplication.

[BibT_eX]

[DOI]

Ankur Srivastava

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

Design and analysis of physical design algorithms.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Symposium on Physical Design, 2001

An exact algorithm for coupling-free routing.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Symposium on Physical Design, 2001

Congestion Reduction During Placement Based on Integer Programming.

[BibT_eX]

[DOI]

Xiaojian Yang

Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

A Super-Scheduler for Embedded Reconfigurable Systems.

[BibT_eX]

[DOI]

Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Instruction Generation for Hybrid Reconfigurable Systems.

[BibT_eX]

[DOI]

Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Creating and Exploiting Flexibility in Steiner Trees.

[BibT_eX]

[DOI]

Proceedings of the 38th Design Automation Conference, 2001

2000

Fast Template Placement for Reconfigurable Computing Systems.

[BibT_eX]

[DOI]

Kia Bazargan

IEEE Des. Test Comput., 2000

3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems.

[BibT_eX]

[DOI]

Kia Bazargan

Des. Autom. Embed. Syst., 2000

Timing Driven Gate Duplication: Complexity Issues and Algorithms.

[BibT_eX]

[DOI]

Ankur Srivastava

Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Predictable Routing.

[BibT_eX]

[DOI]