Ryan Huang

According to our database, Ryan Huang authored at least 10 papers between 2012 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

Observations on Porting In-memory KV stores to Persistent Memory.

Brian Choi, Parv Saxena, Ryan Huang, Randal Burns

CoRR, 2020

2017

Dynamic Data-Dependent Reference to Improve Sense Margin and Speed of Magnetoresistive Random Access Memory.

Xiaoyong Xue, Yarong Fu, Yanqing Zhao, Juan Xu, Jianguo Yang, Yufeng Xie, Yinyin Lin, Ryan Huang, Qingtian Zou, Jingang Wu

IEEE Trans. Circuits Syst. II Express Briefs, 2017

2016

Low-Power Variation-Tolerant Nonvolatile Lookup Table Design.

Xiaoyong Xue, Jianguo Yang, Yinyin Lin, Ryan Huang, Qingtian Zou, Jingang Wu

IEEE Trans. Very Large Scale Integr. Syst., 2016

A Logic Resistive Memory Chip for Embedded Key Storage With Physical Security.

Yufeng Xie, Xiaoyong Xue, Jianguo Yang, Yinyin Lin, Qingtian Zou, Ryan Huang, Jingang Wu

IEEE Trans. Circuits Syst. II Express Briefs, 2016

A self-adaptive write driver with fast termination of step-up pulse for ReRAM.

Jianguo Yang, Xiaoyong Xue, Juan Xu, Fan Ye, Yinyin Lin, Ryan Huang, Qingtian Zou, Jingang Wu

IEICE Electron. Express, 2016

2015

A low cost and high reliability true random number generator based on resistive random access memory.

Jianguo Yang, Juan Xu, Bo Wang, Xiaoyong Xue, Ryan Huang, Qingtian Zou, Jingang Wu, Yinyin Lin

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2013

A 0.13 µm 8 Mb Logic-Based Cu_x Si_y O ReRAM With Self-Adaptive Operation for Yield Enhancement and Power Reduction.

Xiaoyong Xue, Wenxiang Jian, Jianguo Yang, Fanjie Xiao, Gang Chen, Shuliu Xu, Yufeng Xie, Yinyin Lin, Ryan Huang, Qingtian Zou, Jingang Wu

IEEE J. Solid State Circuits, 2013

A 2Mb ReRAM with two bits error correction codes circuit for high reliability application.

Jianguo Yang, Ying Meng, Xiaoyong Xue, Ryan Huang, Q. T. Zhou, J. G. Wu, Yinyin Lin

Proceedings of the IEEE 10th International Conference on ASIC, 2013

Novel operation scheme and technological optimization for 1T bulk capacitor-less DRAM.

Hui Li, Wei Zhu, Ningxi Liu, Cunlin Dong, Chao Meng, Yinyin Lin, Ryan Huang, Qingtian Zou, Jingang Wu

Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012

Variation-tolerant Cu_xSi_yO-based RRAM for low power application.

Wenxiang Jian, Gang Jin, Na Yan, Zhongyu Bi, Hao Min, Yinyin Lin, Ryan Huang, Qingtian Zou, Jingang Wu

IEICE Electron. Express, 2012