Russ Hoover
According to our database1,
Russ Hoover
authored at least 2 papers
between 2000 and 2010.
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Bibliography
2010
A wire-speed power<sup>TM</sup> processor: 2.3GHz 45nm SOI with 16 cores and 64 threads.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2000
A methodology for formal design of hardware control with application to cache coherence protocols.
Proceedings of the 37th Conference on Design Automation, 2000