Runxi Zhang

Orcid: 0000-0002-1459-5362

According to our database1, Runxi Zhang authored at least 33 papers between 2011 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
A 10.31 ENOB 3.125MHz BW fully passive 2nd-order noise-shaping SAR ADC for low cost IoT sensor networks.
IEICE Electron. Express, 2024

23.1 A 44μW IoT Tag Enabling 1μs Synchronization Accuracy and OFDMA Concurrent Communication with Software-Defined Modulation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

A PCA Acceleration Algorithm For WiFi Sensing And Its Hardware Implementation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
A Real-Time Respiration Monitoring System Using WiFi Sensing Based on the Concentric Circle Model.
IEEE Trans. Biomed. Circuits Syst., April, 2023

A 400-MS/s 10-Bit SAR-Assisted Two-Step Digital-Slope ADC.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

A 88%-Peak-Efficiency 10-mV-Voltage-Ripple Dual-Mode Switched-Capacitor DC-DC Converter for Ultra-Low-Power Battery Management.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A 3.84 GHz 32 fs RMS Jitter Over-Sampling PLL with High-Gain Cross-Switching Phase Detector.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A High-Gain and Low-Noise Mixer with Hybrid $G_{m}$-Boosting for 5G FR2 Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A 4.8 GS/s 11b Time-Interleaved TDC-Assisted SAR ADC with High-Speed Latch-based VTC.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

A Low-Power 8-to-12-bit Reconfigurable SAR ADC for Portable Ultrasound Systems.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023

2022
A 24 GHz FMCW/Doppler Dual-Mode Frequency Synthesizer With 68.8 kHz RMS FM Error and 1.25 GHz Chirp Bandwidth.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A 21.3-24.5Gb/s low jitter PLL-based clock and data recovery circuit with cascode-coupled quadrature LC-VCO.
IEICE Electron. Express, 2022

A Real-time Respiration Monitoring System Using WiFi-Based Radar Model.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A 23.4-27.6 GHz "Zig-Zag" VCO with Continuous Frequency Switching for FMCW Radars.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A 71-86 GHz Cascaded Harmonic Enhanced Tripler with -69 dBc Fundamental and -66 dBc Second Harmonic Suppression.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
A Wideband Noise and Harmonic Distortion Canceling Low-Noise Amplifier for High-Frequency Ultrasound Transducers.
Sensors, 2021

A high gain V-band power amplifier for 5G applications.
IEICE Electron. Express, 2021

A 64-84 GHz CMOS LNA with Excellent Gain Flatness for Wideband mmW Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 22-33 GHz Wideband CMOS LNA Using Low-k Non-inverting MCCRs for 5G mmW Communication Applications.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

2020
A 76-81 GHz CMOS mmW quadrature down-conversion mixer for automotive radar applications.
IEICE Electron. Express, 2020

A 1.2 GHz bandwidth and 88 dB gain range analog baseband for multi-standard 60 GHz applications.
IEICE Electron. Express, 2020

Machine-Learning Based Nonlinerity Correction for Coarse-Fine SAR-TDC Hybrid ADC.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

An Automatic Comparator Offset Calibration for High-Speed Flash ADCs in FDSOI CMOS Technology.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

A Quadrature Frequency Synthesizer with 118.7-fs Jitter, 27.94% Locking Range for Multiband 5G mmW Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A 6-b 20-GS/s 2-Way Time-Interleaved Flash ADC with Automatic Comparator Offset Calibration in 28-nm FDSOI.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
A Low-Power SiPM Readout Front-End with Fast Pulse Generation and Successive-Approximation Register ADC in 0.18 μm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A 500 MS/s 10-Bit Single-Channel SAR ADC with A Double-Rate Comparator.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2018
A Ka-band Dual Co-tuning Frequency Synthesizer with 21.9% Locking Range and Sub-200 fs RMS Jitter in CMOS for 5G mm-Wave Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A Bandwidth-Tracking Self-Biased 5-to-2800 MHz Low-Jitter Clock Generator in 55nm CMOS.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

A Current Reuse Wideband LNA with Complementary Noise and Distortion Cancellation for Ultrasound Imaging Applications.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2015
Research of segmented 8bit voltage-mode R-2R ladder DAC.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

A wideband VCO with constant tuning-gain and uniform sub-band interval for single-chip UHF RFID reader.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2011
A 0.8-2.5GHz wideband SiGe BiCMOS low noise amplifier with noise fiugre of 1.98-3.3dB.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011


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