Ruitao Wang

Orcid: 0000-0001-6054-5799

According to our database1, Ruitao Wang authored at least 21 papers between 2021 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2025
Deep learning-based CT image for pulmonary nodule classification with intrathoracic fat: A multicenter study.
Biomed. Signal Process. Control., 2025

2024
A Broadband Variable-Gain Low-Noise Amplifier With Low NF and Dual Phase Compensation.
IEEE Trans. Circuits Syst. II Express Briefs, September, 2024

Automatic Design for W-Band Front-End System via Bottom-Up Sizing and Layout Generation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2024

An Adaptive Analog Temperature Compensated W-Band Front-End With ±0.0033 dB/°C Gain Variation Across -30 °C to 120 °C.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2024

CellAgent: An LLM-driven Multi-Agent Framework for Automated Single-cell Data Analysis.
CoRR, 2024

2023
Fast Surrogate-Assisted Constrained Multiobjective Optimization for Analog Circuit Sizing via Self-Adaptive Incremental Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2023

Output-feedback tracking control of random high-order nonlinear systems.
Int. J. Control, July, 2023

A Ka-Band Mutual Coupling Resilient Balanced PA with Magnetic Coupling Self-Cancelling Inductor Achieving 21.2dBm OP1dBand 27.6% PAE1dB.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

2022
Asynchronous Parallel Expected Improvement Matrix-Based Constrained Multi-Objective Optimization for Analog Circuit Sizing.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Few-Shot Learning UAV Recognition Methods Based on the Tri-Residual Semantic Network.
IEEE Commun. Lett., 2022

Deep learning radiomics under multimodality explore association between muscle/fat and metastasis and survival in breast cancer patients.
Briefings Bioinform., 2022

A Packaged 90-to-96GHz 16-Element Phased Array with 18.8/15.8dBm Psat/OP1dB, 14.8% TX PAE in 65nm CMOS Process and +51dBm Array EIRP.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

An Ultra-compact Bidirectional T/R Folded 25.8-39.2GHz Phased-Array Transceiver Front-End with Embedded TX Power Detection/Self-calibration Path Supporting 64-/256-/512-QAM at 28-/39-GHz band for 5G in 65nm CMOS Technology.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A 1V 32.1 dBm 92-to-102GHz Power Amplifier with a Scalable 128-to-1 Power Combiner Achieving 15% Peak PAE in a 65nm Bulk CMOS Process.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

Building Post-layout Performance Model of Analog/RF Circuits by Fine-tuning Technique.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

An Efficient Kriging-based Constrained Multi-objective Evolutionary Algorithm for Analog Circuit Synthesis via Self-adaptive Incremental Learning.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021
14.5 A 1V W-Band Bidirectional Transceiver Front-End with <1dB T/R Switch Loss, <1°/dB Phase/Gain Resolution and 12.3% TX PAE at 15.1dBm Output Power in 65nm CMOS Technology.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

Large-scale Integrated Circuits Simulation Based on CNT-FET Model.
Proceedings of the International Conference on IC Design and Technology, 2021

A Dual-Mode 24-32 GHz 4-Element Phased-Array Transceiver Front-End with SSA Beamformer for Autonomous Agile Unknown Signal Tracking and Blocker Rejection within <0.1 us and 21.3%/15% Transmitter Peak/OP1dB PAE.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

An Ultra-Compact 84.9-107GHz LNA with 4.9dB NF by Utilizing Coupled-line-based Gm-Boosting and Noise-Canceling Techniques in 65-nm CMOS Technology.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

An efficient optimization method of RF passive components using RBF model.
Proceedings of the 14th IEEE International Conference on ASIC, 2021


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