Rui Xu

Orcid: 0000-0001-6891-8027

Affiliations:
  • East China Normal University, School of Computer Science and Technology, Shanghai, China


According to our database1, Rui Xu authored at least 19 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Bibliography

2024
Ensuring consistent recovery under power failure with minimal NVM write overhead.
J. Syst. Archit., 2024

An efficient flattened index structure with lazy restructuring and hotness awareness.
Future Gener. Comput. Syst., 2024

Sparrow: Flexible Memory Deduplication in Android Systems with Similar-Page Awareness.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023
Efficient algorithm for full-state quantum circuit simulation with DD compression while maintaining accuracy.
Quantum Inf. Process., November, 2023

Optimizing Data Placement for Hybrid SRAM+Racetrack Memory SPM in Embedded Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2023

Loop interchange and tiling for multi-dimensional loops to minimize write operations on NVMs.
J. Syst. Archit., February, 2023

Hardware-aware neural architecture search for stochastic computing-based neural networks on tiny devices.
J. Syst. Archit., February, 2023

Rapid recovery of program execution under power failures for embedded systems with NVM.
Microprocess. Microsystems, 2023

A Prototype of Efficient Learning System for Objective-Driven Learners.
Proceedings of the 12th IEEE International Conference on Educational and Information Technology, 2023

Optimizing Data Layout for Racetrack Memory in Embedded Systems.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022
Pseudo-Log: Restore Global Data Facing Power Failures with Minimum NVM Write.
Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022

Efficient Checkpoint under Unstable Power Supplies on NVM based Devices.
Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022

Optimal Loop Tiling for Minimizing Write Operations on NVMs with Complete Memory Latency Hiding.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

BSC: Block-based Stochastic Computing to Enable Accurate and Efficient TinyML.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021
Exploring Efficient Architectures on Remote In-Memory NVM over RDMA.
ACM Trans. Embed. Comput. Syst., 2021

Performance optimization for parallel systems with shared DWM via retiming, loop scheduling, and data placement.
J. Syst. Archit., 2021

Relaxed Placement: Minimizing Shift Operations for Racetrack Memory in Hybrid SPM.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

2020
Architectural Exploration on Racetrack Memories.
Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

Optimizing Data Placement for Hybrid SPM with SRAM and Racetrack Memory.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020


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