Rui Santos-Tavares

Orcid: 0000-0001-6103-4851

According to our database1, Rui Santos-Tavares authored at least 22 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

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Online presence:

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Bibliography

2024
Analog Flat-Level Circuit Synthesis With Genetic Algorithms.
IEEE Access, 2024

2021
An Integrated Decision Support System for Improving Wildfire Suppression Management.
ISPRS Int. J. Geo Inf., 2021

Transistor-level optimization methodology for the complete design of switched-capacitor filter circuits.
Int. J. Circuit Theory Appl., 2021

Voice-Activated Smart Home Controller Using Machine Learning.
IEEE Access, 2021

2020
Automatic Flat-Level Circuit Generation with Genetic Algorithms.
Proceedings of the Technological Innovation for Life Improvement, 2020

2017
Undergraduate Electronics Projects Based on the Design of an Optical Wireless Audio Transmission System.
IEEE Trans. Educ., 2017

A Numerical Methodology for the Analysis of Switched-Capacitor Filters Taking Into Account Non-Ideal Effects of Switches and Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

2015
Analysis of a noise canceling LNA using a Si2 OpenAccess based tool - CADIT.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

Automatic design of high-order SC filter circuits.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
A top-down optimization methodology for SC filter circuit design.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A Top-Down Optimization Methodology for SC Filter Circuit Design Using Varying Goal Specifications.
Proceedings of the Technological Innovation for Collective Awareness Systems, 2014

A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013
Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Gain enhancement and input parasitic capacitance reduction of single-stage OTAs by using differential voltage combiners.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

The design of an audio power amplifier as a class project for undergraduate students.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A Low-Voltage CMOS Buffer for RF Applications Based on a Fully-Differential Voltage-Combiner.
Proceedings of the Technological Innovation for the Internet of Things, 2013

2011
A Two-Stage Fully Differential Inverter-Based Self-Biased CMOS Amplifier With High Efficiency.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

2010
Two-stage fully-differential inverter-based self-biased CMOS amplifier with high efficiency.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Fast-settling low-power two-stage self-biased CMOS amplifier using feedforward-regulated cascode devices.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2008
Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2006
Optimum Sizing and Compensation of Two-Stage CMOS Amplifiers Based On a Time-Domain Approach.
Proceedings of the 13th IEEE International Conference on Electronics, 2006


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