Rudy Lauwereins
Orcid: 0000-0002-3861-0168
According to our database1,
Rudy Lauwereins
authored at least 194 papers
between 1987 and 2022.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2012, "For contributions to data flow models in real-time prototyping".
Timeline
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On csauthors.net:
Bibliography
2022
84%-Efficiency Fully Integrated Voltage Regulator for Computing Systems Enabled by 2.5-D High-Density MIM Capacitor.
IEEE Trans. Very Large Scale Integr. Syst., 2022
IEEE Trans. Very Large Scale Integr. Syst., 2022
Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration.
ACM Trans. Design Autom. Electr. Syst., 2022
2021
Proceedings of the International Joint Conference on Neural Networks, 2021
2019
Low Voltage Transient RESET Kinetic Modeling of OxRRAM for Neuromorphic Applications.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
Sub-Word Parallel Precision-Scalable MAC Engines for Efficient Embedded DNN Inference.
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019
2018
Analytic variability study of inference accuracy in RRAM arrays with a binary tree winner-take-all circuit for neuromorphic applications.
Proceedings of the 48th European Solid-State Device Research Conference, 2018
2017
Impact of CSI Feedback Strategies on LTE Downlink and Reinforcement Learning Solutions for Optimal Allocation.
IEEE Trans. Veh. Technol., 2017
Inverter Propagation and Fan-Out Constraints for Beyond-CMOS Majority-Based Technologies.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
J. Signal Process. Syst., 2016
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016
2015
Comparison of NBTI aging on adder architectures and ring oscillators in the downscaling technology nodes.
Microprocess. Microsystems, 2015
Scalable HetNet interference management and the impact of limited channel state information.
EURASIP J. Wirel. Commun. Netw., 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015
2014
IEEE Trans. Image Process., 2014
Proceedings of the 2014 IEEE Wireless Communications and Networking Conference Workshops, 2014
Proceedings of the IEEE Wireless Communications and Networking Conference, 2014
Proceedings of the IEEE Wireless Communications and Networking Conference, 2014
Multi-objective genetic algorithm downlink resource allocation in LTE: Exploiting the cell-edge vs. Cell-center trade-off.
Proceedings of the 21st IEEE Symposium on Communications and Vehicular Technology in the Benelux, 2014
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2014
Degradation analysis of datapath logic subblocks under NBTI aging in FinFET technology.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014
Towards approaching near-optimal MIMO detection performance ONAC-programmable baseband processor.
Proceedings of the IEEE International Conference on Acoustics, 2014
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2013
Exploration of Lattice Reduction Aided Soft-Output MIMO Detection on a DLP/ILP Baseband Processor.
IEEE Trans. Signal Process., 2013
Impact of duty factor, stress stimuli, gate and drive strength on gate delay degradation with an atomistic trap-based BTI model.
Microprocess. Microsystems, 2013
Int. J. Comput. Vis., 2013
A computationally efficient soft-output Lattice Reduction-aided Selective Spanning Sphere Decoder for wireless MIMO systems.
Proceedings of the 24th IEEE Annual International Symposium on Personal, 2013
2012
IEEE Trans. Image Process., 2012
Supplementary Proof for "Equalization Algorithms in the Frequency Domain for Continuous Phase Modulations".
IEEE Trans. Commun., 2012
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012
Proceedings of the 19th IEEE Symposium on Communications and Vehicular Technology in the Benelux, 2012
Lattice Reduction aided Selective Spanning with Fast Enumeration for soft-output MIMO detection.
Proceedings of the 20th European Signal Processing Conference, 2012
Towards a real-time high-definition depth sensor with hardware-efficient stereo matching.
Proceedings of the Stereoscopic Displays and Applications XXIII, 2012
Impact of Duty Factor, Stress Stimuli, and Gate Drive Strength on Gate Delay Degradation with an Atomistic Trap-Based BTI Model.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
2011
IEEE Trans. Circuits Syst. Video Technol., 2011
IEEE Trans. Circuits Syst. Video Technol., 2011
EURASIP J. Wirel. Commun. Netw., 2011
EURASIP J. Wirel. Commun. Netw., 2011
Proceedings of the Real-Time Image and Video Processing 2011, 2011
Proceedings of the 8th International Symposium on Wireless Communication Systems, 2011
Proceedings of the 19th European Signal Processing Conference, 2011
Performance analysis of the distributed ZF beamformer in the presence of carrier frequency offset.
Proceedings of the 19th European Signal Processing Conference, 2011
Hybrid lattice reduction algorithm and its implementation on an SDR baseband processor for LTE.
Proceedings of the 19th European Signal Processing Conference, 2011
2010
Novel block constructions using an intrafix for CPM with frequency domain equalization.
IEEE Trans. Wirel. Commun., 2010
Modeling and exploiting spatial locality trade-offs in wavelet-based applications under varying resource requirements.
ACM Trans. Embed. Comput. Syst., 2010
Proceedings of the International Conference on Image Processing, 2010
Proceedings of the International Conference on Image Processing, 2010
Proceedings of IEEE International Conference on Communications, 2010
Proceedings of the IEEE International Conference on Acoustics, 2010
2009
Exploiting Varying Resource Requirements in Wavelet-based Applications in Dynamic Execution Environments.
J. Signal Process. Syst., 2009
IEEE Trans. Wirel. Commun., 2009
Spatial locality exploitation for runtime reordering of JPEG2000 wavelet data layouts.
ACM Trans. Design Autom. Electr. Syst., 2009
Proceedings of the 2009 IEEE International Conference on Multimedia and Expo, 2009
Robust stereo matching with fast Normalized Cross-Correlation over shape-adaptive regions.
Proceedings of the International Conference on Image Processing, 2009
Proceedings of the 12th IEEE International Conference on Computer Vision Workshops, 2009
A Flexible Antenna Selection Scheme for 60 GHz Multi-Antenna Systems Using Interleaved ADCs.
Proceedings of IEEE International Conference on Communications, 2009
Proceedings of IEEE International Conference on Communications, 2009
Proceedings of the 17th European Signal Processing Conference, 2009
Proceedings of the 17th European Signal Processing Conference, 2009
2008
IEEE Micro, 2008
Proceedings of IEEE International Conference on Communications, 2008
Proceedings of the IEEE International Conference on Acoustics, 2008
Proceedings of the IEEE International Conference on Acoustics, 2008
Proceedings of the Global Communications Conference, 2008. GLOBECOM 2008, New Orleans, LA, USA, 30 November, 2008
Proceedings of the Global Communications Conference, 2008. GLOBECOM 2008, New Orleans, LA, USA, 30 November, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
EURASIP J. Wirel. Commun. Netw., 2007
Sensitivity to Front-End Non-Idealities of Low PAPR Modulation Schemes for Communications at 60 GHz.
Proceedings of the 65th IEEE Vehicular Technology Conference, 2007
Proceedings of the IEEE International Conference on Acoustics, 2007
Low-Complexity Frequency Domain Equalization Receiver for Continuous Phase Modulation.
Proceedings of the Global Communications Conference, 2007
Proceedings of the 2007 5th Workshop on Embedded Systems for Real-Time Multimedia, 2007
2006
Platform independent optimisation of multi-resolution 3D content to enable universal media access.
Vis. Comput., 2006
Eliminating CPU overhead for on-the-fly content adaptation with MPEG-4 wavelet subdivision surfaces.
IEEE Trans. Consumer Electron., 2006
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006
2005
Methodology for Refinement and Optimisation of Dynamic Memory Management for Embedded Systems in Multimedia Applications.
J. VLSI Signal Process., 2005
J. Embed. Comput., 2005
IEEE Des. Test Comput., 2005
Proceedings of the Proceeding of the Tenth International Conference on 3D Web Technology, 2005
Memory Hierarchy Energy Cost of a Direct Filtering Implementation of the Wavelet Transform.
Proceedings of the Integrated Circuit and System Design, 2005
Proceedings of the 42nd Design Automation Conference, 2005
2004
Integr., 2004
Proceedings of the Proceeding of the Ninth International Conference on 3D Web Technology, 2004
Fast prototyping and refinement of complex dynamic data types in multimedia applications for consumer embedded devices.
Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, 2004
High-Level Data-Access Analysis for Characterisation of (Sub)task-Level Parallelism in Java.
Proceedings of the 9th International Workshop on High-Level Programming Models and Supportive Environments (HIPS 2004), 2004
Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to Implementation.
Proceedings of the Field Programmable Logic and Application, 2004
Design-Time Data-Access Analysis for Parallel Java Programs with Shared-Memory Communication Model.
Proceedings of the Euro-Par 2004 Parallel Processing, 2004
QOS Aware HW/SW Partitioning on Run-time Reconfigurable Multimedia Platforms.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004
Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study.
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
Search space definition and exploration for nonuniform data reuse opportunities in data-dominant applications.
ACM Trans. Design Autom. Electr. Syst., 2003
IEEE Trans. Speech Audio Process., 2003
Proceedings of the Software and Compilers for Embedded Systems, 7th International Workshop, 2003
Power Estimation Approach of Dynamic Data Storage on a Hardware Software Boundary Level.
Proceedings of the Integrated Circuit and System Design, 2003
Proceedings of the 2003 International Symposium on System-on-Chip, 2003
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003
A framework for mapping scalable networked applications on run-time reconfigurable platforms.
Proceedings of the 2003 IEEE International Conference on Multimedia and Expo, 2003
Proceedings of the 2003 International Conference on Geometric Modeling and Graphics, 2003
ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
Hierarchical Run-Time Reconfiguration Managed by an Operating System for Reconfigurable Systems.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003
Proceedings of the 2003 Design, 2003
Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip.
Proceedings of the 2003 Design, 2003
Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo Scheduling.
Proceedings of the 2003 Design, 2003
2002
IEEE Trans. Software Eng., 2002
Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects.
J. Supercomput., 2002
Proceedings of the 10-th International Conference in Central Europe on Computer Graphics, 2002
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002
Proceedings of the Protocols and Systems for Interactive Distributed Multimedia, 2002
Proceedings of the 2002 International Computer Music Conference, 2002
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002
Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific Applications.
Proceedings of the Field-Programmable Logic and Applications, 2002
Proceedings of the 2002 Design, 2002
2001
IEEE Des. Test Comput., 2001
DF*: Modeling Dynamic Process Creation and Events for Interactive Multimedia Applications.
Proceedings of the 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 2001
Proceedings of the Ninth Euromicro Workshop on Parallel and Distributed Processing, 2001
Proceedings of the Ninth Euromicro Workshop on Parallel and Distributed Processing, 2001
Proceedings of the 2001 International Computer Music Conference, 2001
Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and Hardware.
Proceedings of the Field-Programmable Logic and Applications, 2001
Proceedings of the Field-Programmable Logic and Applications, 2001
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of ASP-DAC 2001, 2001
2000
Transformations of a 3D Image Reconstruction Algorithm for Data Transfer and Storage Optimisation.
Des. Autom. Embed. Syst., 2000
Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), 2000
Proceedings of the Eight Euromicro Workshop on Parallel and Distributed Processing, 2000
Dynamic Memory Oriented Transformations in the MPEG4 IM1-Player on a Low Power Platform.
Proceedings of the Power-Aware Computer Systems, First International Workshop, 2000
Proceedings of the 13th International Symposium on System Synthesis, 2000
Task Concurrency Management Experiment for Power-Efficient Speed-up of Embedded MPEG4 IM1 Player.
Proceedings of the 2000 International Workshop on Parallel Processing, 2000
Proceedings of the High-Performance Computing and Networking, 8th International Conference, 2000
Proceedings of the 7th IEEE International Symposium on Engineering of Computer-Based Systems (ECBS 2000), 2000
1999
An Application-Level Dependable Technique for Farmer-Worker Parallel Programs.
Informatica (Slovenia), 1999
Transformations of a 3D Image Reconstruction Algorithm for Data Transfer and Storage Optimization.
Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping (RSP 1999), 1999
Proceedings of the Seventh Euromicro Workshop on Parallel and Distributed Processing. PDP'99, 1999
TIRAN: Flexible and Portable Fault Tolerance Solutions for Cost Effective Dependable Applications.
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999
A Software Library, A Control Backbone and User-Specified Recovery Strategies to Enhance the Dependability of Embedded Systems.
Proceedings of the 25th EUROMICRO '99 Conference, 1999
1998
IEE Proc. Softw., 1998
Proceedings of the Ninth IEEE International Workshop on Rapid System Prototyping (RSP 1998), 1998
A hypermedia distributed application for monitoring and fault-injection in embedded fault-tolerant parallel programs.
Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing, 1998
Proceedings of the 11th International Symposium on System Synthesis, 1998
Proceedings of the Digest of Papers: FTCS-28, 1998
The EFTOS Voting Farm: A Software Tool for Fault Masking in Message Passing Parallel Environments.
Proceedings of the 24th EUROMICRO '98 Conference, 1998
1997
Proceedings of the Proceedings 8th IEEE International Workshop on Rapid System Prototyping: Shortening the Path from Specification to Prototype, 1997
Proceedings of the 10th International Symposium on System Synthesis, 1997
Proceedings of the Second IEEE Symposium on Computers and Communications (ISCC 1997), 1997
Proceedings of the Euro-Par '97 Parallel Processing, 1997
Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets.
Proceedings of the 34st Conference on Design Automation, 1997
1996
On the Design and Implementation of Broadcast and Global Combine Operations Using the Postal Model.
IEEE Trans. Parallel Distributed Syst., 1996
Implementing DSP applications on heterogeneous targets using minimal size data buffers.
Proceedings of the Seventh IEEE International Workshop on Rapid System Prototyping (RSP '96), 1996
Proceedings of the 4th Euromicro Workshop on Parallel and Distributed Processing (PDP '96), 1996
OMI building blocks and developments for future high performance processing systems in the aerospace and automotive fields: DSP, SMCS and VIRTUOSO.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996
Proceedings of the Euro-Par '96 Parallel Processing, 1996
1995
PDG: A process-level debugger for concurrent programs in the GRAPE parallel programming environment.
Future Gener. Comput. Syst., 1995
Computer, 1995
A Compact Fault-tolerant, Deadlock-free, Minimal Routing Algorithm for n-Dimensional Wormhole Switching Based Meshes.
Proceedings of the Structure, Information and Communication Complexity, 1995
Proceedings of the Sixth IEEE International Workshop on Rapid System Prototyping (RSP '95), 1995
A Loader for Injured Massively Parallel Regular Networks.
Proceedings of the Seventh IASTED/ISMM International Conference on Parallel and Distributed Computing and Systems, 1995
A User-Adaptable Fault Tolerant Motor Controller using an Argument Flow Multiprocessor System.
Proceedings of the Seventh IASTED/ISMM International Conference on Parallel and Distributed Computing and Systems, 1995
A User-triggered Checkpointing Library for Computationintensive Applications.
Proceedings of the Seventh IASTED/ISMM International Conference on Parallel and Distributed Computing and Systems, 1995
The Consistent File-Status in a User-Triggered Checkpointing Approach.
Proceedings of the Parallel Computing: State-of-the-Art and Perspectives, 1995
Proceedings of the 1995 International Conference on Acoustics, 1995
Proceedings of the High-Performance Computing and Networking, 1995
Proceedings of the 28th Annual Hawaii International Conference on System Sciences (HICSS-28), 1995
Proceedings of the 7th Euromicro Workshop on Real-Time Systems, 1995
1994
Closse Approximations of Sigmoid Functions by Sum of Step for VLSI Implementation of Neural Networks.
Sci. Ann. Cuza Univ., 1994
Fault-Tolerant Compact Routing Based on Reduced Structural Information in Wormhole-Switching Based Networks.
Proceedings of the Structural Information and Communication Complexity, 1994
Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994
Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994
The FTMPS-Project: Design and Implementation of Fault-Tolerance Techniques for Massively Parallel Systems.
Proceedings of the High-Performance Computing and Networking, 1994
PDG: A Portable Process-Level Debugger for CSP-Style Parallel Programs.
Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994
Proceedings of the 2nd European Symposium on Artificial Neural Networks, 1994
1993
J. VLSI Signal Process., 1993
PDG: a process-level debugger for concurrent programs in the GRAPE rapid prototyping environment.
Proceedings of the Fourth International Workshop on Rapid System Prototyping, 1993
Proceedings of the Fourth International Workshop on Rapid System Prototyping, 1993
Proceedings of the 1st European Symposium on Artificial Neural Networks, 1993
1992
GRAPE-II: a tool for the rapid prototyping of multi-rate asynchronous DSP applications on heterogeneous multiprocessors.
Proceedings of the Third International Workshop on Rapid System Prototyping, 1992
1991
Proceedings of the Parallel Computation, First International ACPC Conference, Salzburg, Austria, September 30, 1991
1990
Proceedings of the First International Workshop on Rapid System Prototyping, 1990
1987
An Integrated Software-Hardware Multiprocesor Project.
Proceedings of the International Conference on Parallel Processing, 1987