Ruben Purdy

According to our database1, Ruben Purdy authored at least 10 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
Faulty Function Extraction for Defective Circuits.
Proceedings of the IEEE European Test Symposium, 2024

Silent Data Corruption: Test or Reliability Problem?
Proceedings of the IEEE European Test Symposium, 2024

2023
Non-Linear CNN-Based Read Channel for Hard Disk Drive With 30% Error Rate Reduction and Sequential 200-Mbits/s Throughput in 28-nm CMOS.
IEEE J. Solid State Circuits, 2023

Characterize the ability of GNNs in attacking logic locking.
Proceedings of the 5th ACM/IEEE Workshop on Machine Learning for CAD, 2023

2022
Non-linear CNN-based Read Channel for Hard Disk Drive with 30% Error Rate Reduction and Sequential 200Mbits/second Throughput in 28nm CMOS.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Large-Scale Logic-Locking Attacks via Simulation.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

Secuirty Metrics for Logic Circuits.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022

2021
RANC: Reconfigurable Architecture for Neuromorphic Computing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

2020
CircuitGraph: A Python package for Boolean circuits.
J. Open Source Softw., 2020

FPGA Based Emulation Environment for Neuromorphic Architectures.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020


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