Roxanne Vu

According to our database1, Roxanne Vu authored at least 6 papers between 1998 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Other 

Links

On csauthors.net:

Bibliography

2021
ADC-DSP-Based 10-to-112-Gb/s Multi-Standard Receiver in 7-nm FinFET.
IEEE J. Solid State Circuits, 2021

10-to-112-Gb/s DSP-DAC-Based Transmitter in 7-nm FinFET With Flex Clocking Architecture.
IEEE J. Solid State Circuits, 2021

2020

6.3 A 10-to-112Gb/s DSP-DAC-Based Transmitter with 1.2Vppd Output Swing in 7nm FinFET.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2014
An Adaptive Body-Biased Clock Generation System in 28nm CMOS.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014

1998
A 2.6-GByte/s multipurpose chip-to-chip interface.
IEEE J. Solid State Circuits, 1998


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