Rostislav (Reuven) Dobkin

According to our database, Rostislav (Reuven) Dobkin authored at least 18 papers between 2002 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2017

A 1.4×FO4 self-clocked asynchronous serial link in 0.18 µm for intrachip communication.

Y. Zhang, Rostislav (Reuven) Dobkin, Aharon Unikovski, Danniel Nahmanny, Goel Samuel, Michael Moyal, Ran Ginosar

Integr., 2017

2014

StarSync: An extendable standard-cell mesochronous synchronizer.

Dmitry Verbitsky, Rostislav (Reuven) Dobkin, Ran Ginosar, Salomon Beer

Integr., 2014

2013

MTBF Estimation in Coherent Clock Domains.

Salomon Beer, Ran Ginosar, Rostislav (Reuven) Dobkin, Yoav Weizman

Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013

2011

An on-chip metastability measurement circuit to characterize synchronization behavior in 65nm.

Salomon Beer, Ran Ginosar, Michael Priel, Rostislav (Reuven) Dobkin, Avinoam Kolodny

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010

Asynchronous Current Mode Serial Communication.

Rostislav (Reuven) Dobkin, Michael Moyal, Avinoam Kolodny, Ran Ginosar

IEEE Trans. Very Large Scale Integr. Syst., 2010

The Devolution of Synchronizers.

Salomon Beer, Ran Ginosar, Michael Priel, Rostislav (Reuven) Dobkin, Avinoam Kolodny

Proceedings of the 16th IEEE International Symposium on Asynchronous Circuits and Systems, 2010

2009

QNoC asynchronous router.

Rostislav (Reuven) Dobkin, Ran Ginosar, Avinoam Kolodny

Integr., 2009

Two-phase synchronization with sub-cycle latency.

Rostislav (Reuven) Dobkin, Ran Ginosar

Integr., 2009

2008

Parallel vs. serial on-chip communication.

Rostislav (Reuven) Dobkin, Arkadiy Morgenshtein, Avinoam Kolodny, Ran Ginosar

Proceedings of the Tenth International Workshop on System-Level Interconnect Prediction (SLIP 2008), 2008

Fast Universal Synchronizers.

Rostislav (Reuven) Dobkin, Ran Ginosar

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008

2007

QNoC Asynchronous Router with Dynamic Virtual Channel Allocation.

Rostislav (Reuven) Dobkin, Ran Ginosar, Israel Cidon

Proceedings of the First International Symposium on Networks-on-Chips, 2007

High Rate Wave-pipelined Asynchronous On-chip Bit-serial Data Link.

Rostislav (Reuven) Dobkin, Yevgeny Perelman, Tuvia Liran, Ran Ginosar, Avinoam Kolodny

Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2007), 2007

2006

High Rate Data Synchronization in GALS SoCs.

Rostislav (Reuven) Dobkin, Ran Ginosar, Christos P. Sotiriou

IEEE Trans. Very Large Scale Integr. Syst., 2006

Fast Asynchronous Shift Register for Bit-Serial Communication.

Rostislav (Reuven) Dobkin, Ran Ginosar, Avinoam Kolodny

Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2006), 2006

2005

Parallel interleaver design and VLSI architecture for low-latency MAP turbo decoders.

Rostislav (Reuven) Dobkin, Michael Peleg, Ran Ginosar

IEEE Trans. Very Large Scale Integr. Syst., 2005

An Asynchronous Router for Multiple Service Levels Networks on Chip.

Rostislav (Reuven) Dobkin, Victoria Vishnyakov, Eyal Friedman, Ran Ginosar

Proceedings of the 11th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2005), 2005

2004

Data Synchronization Issues in GALS SoCs.

Rostislav (Reuven) Dobkin, Ran Ginosar, Christos P. Sotiriou

Proceedings of the 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 2004

2002

Parallel VLSI architecture for MAP turbo decoder.

Rostislav (Reuven) Dobkin, Michael Peleg, Ran Ginosar

Proceedings of the 13th IEEE International Symposium on Personal, 2002