Rongmei Chen
Orcid: 0000-0003-3613-7626
According to our database1,
Rongmei Chen
authored at least 17 papers
between 2016 and 2023.
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Bibliography
2023
Block-level Evaluation and Optimization of Backside PDN for High-Performance Computing at the A14 node.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
Proceedings of the 15th IEEE International Conference on ASIC, 2023
Proceedings of the IEEE International 3D Systems Integration Conference, 2023
2022
Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation - Part II: CNT Interconnect Optimization.
IEEE Trans. Very Large Scale Integr. Syst., 2022
Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation - Part I: CNFET Transistor Optimization.
IEEE Trans. Very Large Scale Integr. Syst., 2022
Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Opportunities of Chip Power Integrity and Performance Improvement through Wafer Backside (BS) Connection: Invited Paper.
Proceedings of the 24th ACM/IEEE Workshop on System Level Interconnect Pathfinding, 2022
Innovations in Transistor Architecture and Device Connectivity for Advanced Logic Scaling.
Proceedings of the International Conference on IC Design and Technology, 2022
2021
Design And Sign-off Methodologies For Wafer-To-Wafer Bonded 3D-ICs At Advanced Nodes (invited).
Proceedings of the ACM/IEEE International Workshop on System Level Interconnect Prediction, 2021
2020
Online Cooperative Teaching Mode Based on Self-Direction Theory in Method of Sport Science Research.
Int. J. Emerg. Technol. Learn., 2020
2019
Design Enablement of Fine Pitch Face-to-Face 3D System Integration using Die-by-Die Place & Route.
Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019
2018
Single-event multiple transients in guard-ring hardened inverter chains of different layout designs.
Microelectron. Reliab., 2018
Modeling the impact of well contacts on SEE response with bias-dependent Single-Event compact model.
Microelectron. Reliab., 2018
2017
Improved on-chip self-triggered single-event transient measurement circuit design and applications.
Microelectron. Reliab., 2017
2016
Single-event performance of differential flip-flop designs and hardening implication.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016