Rong Jiang

Affiliations:
  • University of Wisconsin, Electrical and Computer Engineering Department, College of Engineering, Madison, WI, USA
  • Nanjing University of Science and Technology, Department of electrical engineering, Nanjing, China


According to our database1, Rong Jiang authored at least 8 papers between 2003 and 2005.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2005
EPEEC: comprehensive SPICE-compatible reluctance extraction for high-speed interconnects above lossy multilayer substrates.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Efficient statistical capacitance variability modeling with orthogonal principle factor analysis.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

ICCAP: a linear time sparse transformation and reordering algorithm for 3D BEM capacitance extraction.
Proceedings of the 42nd Design Automation Conference, 2005

Comprehensive frequency dependent interconnect extraction and evaluation methodology.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
Realizable Reduction for Electromagnetically Coupled RLMC Interconnects.
Proceedings of the 2004 Design, 2004

SCORE: SPICE COmpatible Reluctance Extraction.
Proceedings of the 2004 Design, 2004

EPEEC: a compact reluctance based interconnect model considering lossy substrate eddy currents.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003
PODEA: Power delivery efficient analysis with realizable model reduction.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003


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