Ronan Lashermes

Affiliations:
  • INRIA, LHS-PEC, Rennes, France
  • Versailles Saint-Quentin-en-Yvelines University, PRiSM, France (PhD 2014)
  • CEA, TechReg, Gardanne, France


According to our database1, Ronan Lashermes authored at least 21 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
Generic SCARE: reverse engineering without knowing the algorithm nor the machine.
J. Cryptogr. Eng., June, 2024

Characterizing and Modeling Synchronous Clock-Glitch Fault Injection.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2024

2021
Electromagnetic fault injection against a complex CPU, toward new micro-architectural fault models.
J. Cryptogr. Eng., 2021

Under the Dome: Preventing Hardware Timing Information Leakage.
Proceedings of the Smart Card Research and Advanced Applications, 2021

2019
Electromagnetic fault injection against a System-on-Chip, toward new micro-architectural fault models.
CoRR, 2019

2018
Hardware-Assisted Program Execution Integrity: HAPEI.
Proceedings of the Secure IT Systems - 23rd Nordic Conference, NordSec 2018, Oslo, Norway, 2018

When Fault Injection Collides with Hardware Complexity.
Proceedings of the Foundations and Practice of Security - 11th International Symposium, 2018

An Evaluation Tool for Physical Attacks.
Proceedings of the Ad-hoc, Mobile, and Wireless Networks, 2018

Let's shock our IoT's heart: ARMv7-M under (fault) attacks.
Proceedings of the 13th International Conference on Availability, Reliability and Security, 2018

2017
A Scalable and Systolic Architectures of Montgomery Modular Multiplication for Public Key Cryptosystems Based on DSPs.
J. Hardw. Syst. Secur., 2017

How TrustZone Could Be Bypassed: Side-Channel Attacks on a Modern System-on-Chip.
Proceedings of the Information Security Theory and Practice, 2017

2016
A Systolic Hardware Architectures of Montgomery Modular Multiplication for Public Key Cryptosystems.
IACR Cryptol. ePrint Arch., 2016

A Template Attack Against VERIFY PIN Algorithms.
Proceedings of the 13th International Joint Conference on e-Business and Telecommunications (ICETE 2016), 2016

A Multi-round Side Channel Attack on AES Using Belief Propagation.
Proceedings of the Foundations and Practice of Security - 9th International Symposium, 2016

High-Performance Elliptic Curve Cryptography by Using the CIOS Method for Modular Multiplication.
Proceedings of the Risks and Security of Internet and Systems, 2016

2015
Inverting the Final exponentiation of Tate pairings on ordinary elliptic curves using faults.
IACR Cryptol. ePrint Arch., 2015

A survey of fault attacks in pairing based cryptography.
Cryptogr. Commun., 2015

2014
On the security of pairing implementations. (Etude de la sécurité des implémentations de couplage).
PhD thesis, 2014

A Unified Formalism for Physical Attacks.
IACR Cryptol. ePrint Arch., 2014

Practical Validation of Several Fault Attacks against the Miller Algorithm.
Proceedings of the 2014 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2014

2012
A DFA on AES Based on the Entropy of Error Distributions.
Proceedings of the 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2012


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