Ron Gabor
According to our database1,
Ron Gabor
authored at least 8 papers
between 2006 and 2022.
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Bibliography
2022
A Real-Time Error Detection (RTD) Architecture and Its Use for Reliability and Post-Silicon Validation for F/F Based Memory Arrays.
IEEE Trans. Emerg. Top. Comput., 2022
IDLD: Instantaneous Detection of Leakage and Duplication of Identifiers used for Register Renaming.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
2021
Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021
2020
2D Error Correction for F/F based Arrays using In-Situ Real-Time Error Detection (RTD).
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020
2019
Error-Shielded Register Renaming Sub-system for a Dynamically Scheduled Out-of-Order Core.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2009
ACM Trans. Archit. Code Optim., 2009
2007
ACM Trans. Archit. Code Optim., 2007
2006
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006