Roland Strandberg
According to our database1,
Roland Strandberg
authored at least 12 papers
between 2000 and 2023.
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Bibliography
2023
A 12/16 GSps Time-Interleaved Pipelined-SAR ADC with Temperature Robust Performance at 0.75V Supply in 7nm FinFET Technology.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
2022
A Bang-Bang Digital PLL Covering 11.1-14.3 GHz and 14.7-18.7 GHz with sub-40 fs RMS Jitter in 7 nm FinFET Technology.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
2020
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2017
A 12b, 1 GSps TI pipelined-SAR converter with 65 dB SFDR through buffer linearization and gain mismatch correction in 28nm FD-SOI.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
2013
Complex IF Harmonic Rejection Mixer for Non-Contiguous Dual Carrier Reception in 65 nm CMOS.
IEEE J. Solid State Circuits, 2013
Proceedings of the 77th IEEE Vehicular Technology Conference, 2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2012
Proceedings of the 38th European Solid-State Circuit conference, 2012
2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000