Roland Höller

Orcid: 0000-0003-3077-7630

According to our database1, Roland Höller authored at least 8 papers between 2003 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Open-Source Ethernet MAC IP Cores for FPGAs: Overview and Evaluation.
Int. J. Reconfigurable Comput., 2023

2020
Programmable logic devices - key components for today's and tomorrow's electronic-based systems.
Elektrotech. Informationstechnik, 2020

2019
Open-Source RISC-V Processor IP Cores for FPGAs - Overview and Evaluation.
Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

2018
A Model Railway based Demonstrator for Saftey-Critical Systems.
Proceedings of the 12th European Workshop on Microelectronics Education, 2018

2010
Eine neuartige Lösung für Test und Debugging in vernetzten eingebetteten Systemen.
Elektrotech. Informationstechnik, 2010

2007
A Test Tool for FlexRay-based Embedded Systems.
Proceedings of the IEEE Second International Symposium on Industrial Embedded Systems, 2007

2003
FPGAs for High Accuracy Clock Synchronization over Ethernet Networks.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Embedded SynUTC and IEEE 1588 clock synchronization for industrial Ethernet.
Proceedings of 9th IEEE International Conference on Emerging Technologies and Factory Automation, 2003


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