Rohit Lorenzo

Orcid: 0000-0003-2044-5798

According to our database1, Rohit Lorenzo authored at least 11 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A robust radiation resistant SRAM cell for space and military applications.
Integr., 2024

2023
Comprehensive Analysis of a Power-Efficient 1-Bit Hybrid Full Adder Cell.
Wirel. Pers. Commun., March, 2023

A review on radiation-hardened memory cells for space and terrestrial applications.
Int. J. Circuit Theory Appl., January, 2023

Double Node Upset Immune RHBD-14T SRAM Cell for Space and Satellite Applications.
IEEE Access, 2023

A Soft Error Upset Recovery SRAM Cell for Aerospace and Military Applications.
Proceedings of the IEEE Region 10 Conference, 2023

2022
Half-selection disturbance free 8T low leakage SRAM cell.
Int. J. Circuit Theory Appl., 2022

2020
Single bit-line 11T SRAM cell for low power and improved stability.
IET Comput. Digit. Tech., 2020

2019
Low Power 10T SRAM Cell with Improved Stability Solving Soft Error Issue.
Proceedings of the TENCON 2019, 2019

2017
A Novel SRAM Cell Design with a Body-Bias Controller Circuit for Low Leakage, High Speed and Improved Stability.
Wirel. Pers. Commun., 2017

Dynamic Threshold Sleep Transistor Technique for High Speed and Low Leakage in CMOS Circuits.
Circuits Syst. Signal Process., 2017

2016
Optimal Body Bias to Control Stability, Leakage and Speed in SRAM Cell.
J. Circuits Syst. Comput., 2016


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