Rohit Chaurasiya
Orcid: 0000-0003-2810-9588
According to our database1,
Rohit Chaurasiya
authored at least 9 papers
between 2018 and 2022.
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Bibliography
2022
Hardware-Efficient VLSI Architecture and ASIC Implementation of GRCR-Based Cooperative Spectrum Sensor for Cognitive-Radio Network.
IEEE Trans. Very Large Scale Integr. Syst., 2022
Design and ASIC-Implementation of Hardware-Efficient Cooperative Spectrum-Sensor for Data Fusion-Based Cognitive Radio Network.
IEEE Trans. Consumer Electron., 2022
2021
A New Hardware-Efficient Spectrum-Sensor VLSI Architecture for Data-Fusion-Based Cooperative Cognitive-Radio Network.
IEEE Trans. Very Large Scale Integr. Syst., 2021
Area-Efficient and Scalable Data-Fusion Based Cooperative Spectrum Sensor for Cognitive Radio.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
Hardware-Efficient ASIC Implementation of Eigenvalue Based Spectrum Sensor Reconfigurable-Architecture for Cooperative Cognitive-Radio Network.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
Fast Sensing-Time and Hardware-Efficient Eigenvalue-Based Blind Spectrum Sensors for Cognitive Radio Network.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
2019
Hardware-Efficient and Fast Sensing-Time Maximum-Minimum-Eigenvalue-Based Spectrum Sensor for Cognitive Radio Network.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Hardware-Efficient and Low Sensing-Time VLSI-Architecture of MED Based Spectrum Sensor for Cognitive Radio.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
Proceedings of the 36th IEEE International Conference on Computer Design, 2018