Roger Ferrer
Orcid: 0000-0003-3306-8610
According to our database1,
Roger Ferrer
authored at least 33 papers
between 2006 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2024
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024
2023
Acceleration with long vector architectures: Implementation and evaluation of the FFT kernel on NEC SX-Aurora and RISC-V vector extension.
Concurr. Comput. Pract. Exp., 2023
Software Development Vehicles to Enable Extended and Early Co-design: A RISC-V and HPC Case of Study.
Proceedings of the High Performance Computing, 2023
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023
Proceedings of the IEEE International Conference on Cluster Computing, 2023
2022
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022
2021
Proceedings of the OpenMP: Enabling Massive Node-Level Parallelism, 2021
2020
Proceedings of the High Performance Computing, 2020
2018
Performance and energy effects on task-based parallelized applications - User-directed versus manual vectorization.
J. Supercomput., 2018
MPI+X: task-based parallelization and dynamic load balance of finite element assembly.
CoRR, 2018
2015
Proceedings of the OpenMP: Heterogenous Execution and Data Movements, 2015
Proceedings of the 29th ACM on International Conference on Supercomputing, 2015
Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015
2011
Int. J. Parallel Program., 2011
Proceedings of the Euro-Par 2011 Parallel Processing - 17th International Conference, 2011
2010
Int. J. Parallel Program., 2010
Proceedings of the Languages and Compilers for Parallel Computing, 2010
Proceedings of the Beyond Loop Level Parallelism in OpenMP: Accelerators, 2010
Proceedings of the Beyond Loop Level Parallelism in OpenMP: Accelerators, 2010
Proceedings of the High Performance Embedded Architectures and Compilers, 2010
2009
Int. J. Parallel Program., 2009
Achieving high memory performance from heterogeneous architectures with the SARC programming model.
Proceedings of the 10th workshop on MEmory performance, 2009
Proceedings of the Languages and Compilers for Parallel Computing, 2009
Barcelona OpenMP Tasks Suite: A Set of Benchmarks Targeting the Exploitation of Task Parallelism in OpenMP.
Proceedings of the ICPP 2009, 2009
2008
Int. J. Parallel Program., 2008
Proceedings of the 9th workshop on MEmory performance, 2008
2007
Proceedings of the 2007 workshop on MEmory performance, 2007
Proceedings of the A Practical Programming Model for the Multi-Core Era, 2007
Proceedings of the 2007 conference of the Centre for Advanced Studies on Collaborative Research, 2007
2006
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006