Rodrigo N. Wuerdig

According to our database1, Rodrigo N. Wuerdig authored at least 9 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Statistical Analysis of VVC Residual and Entropy Coding aiming Efficient Hardware Design.
Proceedings of the 15th IEEE Latin America Symposium on Circuits and Systems, 2024

2023
AV1 Residual Syntax Elements Assessment and Efficient VLSI Architecture.
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

LEX - A Cell Switching Arcs Extractor: A Simple SPICE-Input Interface for Electrical Characterization.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

2022
Designing a 9.3μW Low-Power Time-to-Digital Converter (TDC) for a Time Assisted SAR ADC.
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

Mitigating Asynchronous QDI Drawbacks on MAC Operators with Approximate Multipliers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2020
Evaluating Cell Library Sizing Methodologies for Ultra-Low Power Near-Threshold Operation in Bulk CMOS.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

Leveraging QDI Robustness to Simplify the Design of IoT Circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Asynchronous Quasi-Random Number Generator: Taking Advantage of PVT Variations.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

Pulsar: Constraining QDI Circuits Cycle Time Using Traditional EDA Tools.
Proceedings of the 25th IEEE International Symposium on Asynchronous Circuits and Systems, 2019


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