Robin Wilson
According to our database1,
Robin Wilson
authored at least 33 papers
between 2003 and 2023.
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Bibliography
2023
Effect of Varying Number of Poles on Performance of a PM-Assisted Synchronous Reluctance Machine Enabled with Iron Nitride Magnet Combinations.
Proceedings of the 49th Annual Conference of the IEEE Industrial Electronics Society, 2023
2021
Circuit Monitoring Across Design Life-Cycle in 28nm FD-SOI and 40nm Bulk CMOS technologies.
Proceedings of the 47th ESSCIRC 2021, 2021
2020
Proceedings of the 46th Annual Conference of the IEEE Industrial Electronics Society, 2020
2018
A 6-Wire Plug and Play Clockless Distributed On-Chip-Sensor Network in 28 nm UTBB FD-SOI.
J. Low Power Electron., 2018
2017
Introducing Turing's mathematics.
Proceedings of the Turing Guide., 2017
2015
IEEE J. Solid State Circuits, 2015
Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015
2014
A Fine-Grain Variation-Aware Dynamic Vdd-Hopping AVFS Architecture on a 32 nm GALS MPSoC.
IEEE J. Solid State Circuits, 2014
A 3 GHz Dual Core Processor ARM Cortex TM -A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization.
IEEE J. Solid State Circuits, 2014
IEEE J. Solid State Circuits, 2014
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
Proceedings of the 20th IEEE International Symposium on Asynchronous Circuits and Systems, 2014
2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoC.
Proceedings of the ESSCIRC 2013, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
2010
2009
J. Embed. Comput., 2009
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009
2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
A Simple Statistical Timing Analysis Flow and Its Application to Timing Margin Evaluation.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
A comprehensive performance macro-modeling of on-chip RC interconnects considering line shielding effects.
Integr., 2006
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
Proceedings of the 2006 International Symposium on Physical Design, 2006
2005
Proceedings of the Integrated Circuit and System Design, 2005
2004
Proceedings of the Integrated Circuit and System Design, 2004
Proceedings of the Integrated Circuit and System Design, 2004
2003
Information Management and Interoperability Strategies: The Case for Digital Identifiers.
Proceedings of the IADIS International Conference WWW/Internet 2003, 2003