Roberto Giorgi

Proceedings of the 15th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 13th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2024

2023

Distributed large-scale graph processing on FPGAs.

[BibT_eX]

[DOI]

J. Big Data, December, 2023

2022

WebRISC-V: A 32/64-bit RISC-V pipeline simulation tool.

[BibT_eX]

[DOI]

Gianfranco Mariotti

SoftwareX, 2022

Extending Performance and Reliability via Modular FPGA Clusters.

[BibT_eX]

[DOI]

Proceedings of the 11th Mediterranean Conference on Embedded Computing, 2022

2021

The AXIOM Project: IoT on Heterogeneous Embedded Platforms.

[BibT_eX]

[DOI]

Antonio Filgueras

Miquel Vidal

Marc Mateu

Dionisios N. Pnevmatikatos

Carlos Álvarez

Xavier Martorell

Eduard Ayguadé

Dimitrios Theodoropoulos

IEEE Des. Test, 2021

The Italian research on HPC key technologies across EuroHPC.

[BibT_eX]

[DOI]

Marco Aldinucci

Giovanni Agosta

Antonio Andreini

Claudio Agostino Ardagna

Proceedings of the CF '21: Computing Frontiers Conference, 2021

DRT: A Lightweight Runtime for Developing Benchmarks for a Dataflow Execution Model.

[BibT_eX]

[DOI]

Amin Sahebi

Proceedings of the Architecture of Computing Systems - 34th International Conference, 2021

2019

Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise - Designing a Computer Architecture via HLS).

[BibT_eX]

[DOI]

Int. J. Reconfigurable Comput., 2019

WebRISC-V: a Web-Based Education-Oriented RISC-V Pipeline Simulation Environment.

[BibT_eX]

[DOI]

Gianfranco Mariotti

Proceedings of the Workshop on Computer Architecture Education, 2019

A Design Space Exploration Tool Set for Future 1K-core High-Performance Computers.

[BibT_eX]

[DOI]

Proceedings of the Rapid Simulation and Performance Evaluation: Methods and Tools, 2019

Analyzing the Impact of Operating System Activity of Different Linux Distributions in a Distributed Environment.

[BibT_eX]

[DOI]

Proceedings of the 27th Euromicro International Conference on Parallel, 2019

A Data-Flow Methodology for Accelerating FFT.

[BibT_eX]

[DOI]

Lorenzo Verdoscia

Amin Sahebi

Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

Embedded Face Analysis for Smart Videosurveillance.

[BibT_eX]

[DOI]

David Oro

Sara Ermini

Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

An Iris+Voice Recognition System for a Smart Doorbell.

[BibT_eX]

[DOI]

Nicola Bettin

Sara Ermini

Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

Bridging a Data-Flow Execution Model to a Lightweight Programming Model.

[BibT_eX]

[DOI]

Proceedings of the 17th International Conference on High Performance Computing & Simulation, 2019

AXIOM: A Scalable, Efficient and Reconfigurable Embedded Platform.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

Scalable embedded computing through reconfigurable hardware: Comparing DF-Threads, cilk, openmpi and jump.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2018

Energy Efficiency Exploration on the ZYNQ Ultrascale+.

[BibT_eX]

[DOI]

Proceedings of the 30th International Conference on Microelectronics, 2018

2017

The AXIOM platform for next-generation cyber physical systems.

[BibT_eX]

[DOI]

Dimitris Theodoropoulos

Carlos Álvarez-Martínez

Xavier Martorell

Dionisis N. Pnevmatikatos

David Oro

Microprocess. Microsystems, 2017

Chapter Two - Exploring Future Many-Core Architectures: The TERAFLUX Evaluation Framework.

[BibT_eX]

[DOI]

Adv. Comput., 2017

AXIOM: A 64-bit reconfigurable hardware/software platform for scalable embedded computing.

[BibT_eX]

[DOI]

Proceedings of the 6th Mediterranean Conference on Embedded Computing, 2017

Rapid prototyping IoT solutions based on Machine Learning.

[BibT_eX]

[DOI]

Proceedings of the European Conference on Cognitive Ergonomics, 2017

2016

Making IoT with UDOO.

[BibT_eX]

[DOI]

Giovanni Burresi

Maurizio Caporali

IxD&A, 2016

Architectural Support for Fault Tolerance in a Teradevice Dataflow System.

[BibT_eX]

[DOI]

Int. J. Parallel Program., 2016

AXIOM: A Hardware-Software Platform for Cyber Physical Systems.

[BibT_eX]

[DOI]

Carlos Álvarez-Martínez

Xavier Martorell

Dionisios N. Pnevmatikatos

David Oro

Dimitris Theodoropoulos

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Exploring dataflow-based thread level parallelism in cyber-physical systems.

[BibT_eX]

[DOI]

Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

2015

Guide to DataFlow Supercomputing - Basic Concepts, Case Studies, and a Detailed Example

[BibT_eX]

[DOI]

Computer Communications and Networks, Springer, ISBN: 978-3-319-16229-4, 2015

Special Section on Terascale Computing.

[BibT_eX]

[DOI]

Pier Stanislao Paolucci

Future Gener. Comput. Syst., 2015

A scalable thread scheduling co-processor based on data-flow principles.

[BibT_eX]

[DOI]

Dionisios N. Pnevmatikatos

Alberto Scionti

Future Gener. Comput. Syst., 2015

The AXIOM project (Agile, eXtensible, fast I/O Module).

[BibT_eX]

[DOI]

Dimitris Theodoropoulos

Javier Rodríguez Saeta

Paolo Gai

Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

A field experience for a vehicle recognition system using magnetic sensors.

[BibT_eX]

[DOI]

Giovanni Burresi

Proceedings of the 4th Mediterranean Conference on Embedded Computing, 2015

Scalable Embedded Systems: Towards the Convergence of High-Performance and Embedded Computing.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on Embedded and Ubiquitous Computing, 2015

Dataflow Support in x86_64 Multicore Architectures through Small Hardware Extensions.

[BibT_eX]

[DOI]

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

The AXIOM Software Layers.

[BibT_eX]

[DOI]

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

A matrix multiplier case study for an evaluation of a configurable dataflow-machine.

[BibT_eX]

[DOI]

Lorenzo Verdoscia

Roberto Vaccaro

Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

Enhancing an x86_64 multi-core architecture with data-flow execution support.

[BibT_eX]

[DOI]

Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

2014

TERAFLUX: Harnessing dataflow in next generation teradevices.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2014

An Introduction to DF-Threads and their Execution Model.

[BibT_eX]

[DOI]

Paolo Faraboschi

Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing Workshop, 2014

Dynamic power reduction in self-adaptive embedded systems through benchmark analysis.

[BibT_eX]

[DOI]

Alberto Scionti

Stamatios Kavvadias

Proceedings of the 3rd Mediterranean Conference on Embedded Computing, 2014

Integration of simulators in virtual 3D computer science classroom.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE Global Engineering Education Conference, 2014

2013

The TERAFLUX Project: Exploiting the DataFlow Paradigm in Next Generation Teradevices.

[BibT_eX]

[DOI]

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012

Simulating the future kilo-x86-64 core processors and their infrastructure.

[BibT_eX]

[DOI]

Proceedings of the 2012 Spring Simulation Multiconference, 2012

TERAFLUX: exploiting dataflow parallelism in teradevices.

[BibT_eX]

[DOI]

Proceedings of the Computing Frontiers Conference, CF'12, 2012

Embedded reconfigurable architectures.

[BibT_eX]

[DOI]

Proceedings of the 15th International Conference on Compilers, 2012

2011

TERAFLUX: Exploiting Tera-device Computing Challenges.

[BibT_eX]

[DOI]

Antoni Portero

Zhibin Yu

Proceedings of the 2nd European Future Technologies Conference and Exhibition, 2011

2010

Exploiting locality to improve leakage reduction in embedded drowsy I-caches at same area/speed.

[BibT_eX]

[DOI]

Massimo Alioto

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, 2009

Programming Abstractions and Toolchain for Dataflow Multithreading Architectures.

[BibT_eX]

[DOI]

Proceedings of the Eighth International Symposium on Parallel and Distributed Computing, 2009

Exploiting DMA to enable non-blocking execution in Decoupled Threaded Architecture.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Introducing Hardware TLP Support in the Cell Processor.

[BibT_eX]

[DOI]

Proceedings of the 2009 International Conference on Complex, 2009

Instruction Set Extensions for Cryptographic Applications.

[BibT_eX]

[DOI]

Sandro Bartolini

Enrico Martinelli

Proceedings of the Cryptographic Engineering, 2009

2008

Effects of Instruction-Set Extensions on an Embedded Processor: A Case Study on Elliptic Curve Cryptography over GF(2<sup>m</sup>).

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2008

Filtering drowsy instruction cache to achieve better efficiency.

[BibT_eX]

[DOI]

Proceedings of the 2008 ACM Symposium on Applied Computing (SAC), 2008

Analyzing Scalability of Deblocking Filter of H.264 via TLP Exploitation in a New Many-Core Architecture.

[BibT_eX]

[DOI]

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

Reducing Leakage through Filter Cache.

[BibT_eX]

[DOI]

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007

DTA-C: A Decoupled multi-Threaded Architecture for CMP Systems.

[BibT_eX]

[DOI]

Proceedings of the 19th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2007), 2007

Reducing leakage in power-saving capable caches for embedded systems by using a filter cache.

[BibT_eX]

[DOI]

Proceedings of the 2007 workshop on MEmory performance, 2007

2006

Memory performance: dealing with applications, systems and architecture.

[BibT_eX]

[DOI]

SIGARCH Comput. Archit. News, 2006

Issues in Embedded Single-Chip Multicore Architectures.

[BibT_eX]

[DOI]

Sandro Bartolini

J. Embed. Comput., 2006

2005

Reducing coherence overhead and boosting performance of high-end SMP multiprocessors running a DSS workload.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2005

2004

A workload characterization of elliptic curve cryptography methods in embedded environments.

[BibT_eX]

[DOI]

Irina Branovic

Enrico Martinelli

SIGARCH Comput. Archit. News, 2004

Speeding-up multiprocessors running DBMS workloads through coherence protocols.

[BibT_eX]

[DOI]

Int. J. High Perform. Comput. Netw., 2004

WebMIPS: a new web-based MIPS simulation environment for computer architecture education.

[BibT_eX]

[DOI]

Irina Branovic

Enrico Martinelli

Proceedings of the 2004 workshop on Computer architecture education, 2004

A Performance Evaluation of ARM ISA Extension for Elliptic Curve Cryptography over Binary Finite Fields.

[BibT_eX]

[DOI]

Proceedings of the 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2004), 2004

2002

Web-based training on computer architecture: the case for JCachesim.

[BibT_eX]

[DOI]

Irina Branovic

Proceedings of the 2002 workshop on Computer architecture education, 2002

Boosting the Performance of Three-Tier Web Servers Deploying SMP Architecture.

[BibT_eX]

[DOI]

Proceedings of the Web Engineering and Peer-to-Peer Computing, 2002

2001

Scheduled Dataflow: Execution Paradigm, Architecture, and Performance Evaluation.

[BibT_eX]

[DOI]

Krishna M. Kavi

Joseph Arul

IEEE Trans. Computers, 2001

Parallel architecture and compilation techniques: selection of workshop papers, guests' editors introduction.

[BibT_eX]

[DOI]

SIGARCH Comput. Archit. News, 2001

Evaluating Optimizing for Multiprocessors E-Commerce Server Running TPC-W Workload.

[BibT_eX]

[DOI]

Proceedings of the 34th Annual Hawaii International Conference on System Sciences (HICSS-34), 2001

Performance Evaluation of a Non-Blocking Multithreaded Architecture for Embedded, Real-Time and DSP Applications.

[BibT_eX]

Krishna M. Kavi

Joseph Arul

Proceedings of the ISCA 14th International Conference on Parallel and Distributed Computing Systems, 2001

2000

Execution and Cache Performance of the Scheduled Dataflow Architecture.

[BibT_eX]

[DOI]

Krishna M. Kavi

Joseph Arul

J. Univers. Comput. Sci., 2000

Performance Analysis of Electronic Commerce Multiprocessor Server.

[BibT_eX]

[DOI]

Proceedings of the 33rd Annual Hawaii International Conference on System Sciences (HICSS-33), 2000

1999

PSCR: A Coherence Protocol for Eliminating Passive Sharing in Shared-Bus Shared-Memory Multiprocessors.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 1999

Process Migration Effects on Memory Performance of Multiprocessor.

[BibT_eX]

[DOI]

Proceedings of the High Performance Computing, 1999

1998

An educational environment for designing and performance tuning of embedded systems.

[BibT_eX]

[DOI]

Proceedings of the 1998 workshop on Computer architecture education, 1998

Analysis of Sharing Overhead in Shared Memory Multiprocessors.

[BibT_eX]

[DOI]

Proceedings of the Thirty-First Annual Hawaii International Conference on System Sciences, 1998

1997

Trace Factory: generating workloads for trace-driven simulation of shared-bus multiprocessors.

[BibT_eX]

[DOI]

IEEE Concurrency, 1997

Cache memory design for embedded systems based on program locality analysis.

[BibT_eX]

[DOI]