Roberto d'Amore

Orcid: 0000-0002-3456-0036

According to our database1, Roberto d'Amore authored at least 22 papers between 2000 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Online presence:

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Bibliography

2024
Positionless Attitude Estimation With Integrated Star and Horizon Sensors.
IEEE Access, 2024

2022
High-Speed and High-Temperature Calorimetric Solid-State Thermal Mass Flow Sensor for Aerospace Application: A Sensitivity Analysis.
Sensors, 2022

2021
FPGA implementation of the JPEG XR for onboard earth-observation applications.
J. Real Time Image Process., 2021

From Control Requirements to PIL Test: Development of a Structure to Autopilot Implementation.
IEEE Access, 2021

2020
iPCM Telemetry Protocol: Reliability and Bandwidth Improvement for PCM IRIG-106.
IEEE Trans. Aerosp. Electron. Syst., 2020

The Feasibility of Remotely Piloted Aircrafts for VOR Flight Inspection.
Sensors, 2020

2018
Error detection method for the ARINC429 communication.
Proceedings of the 19th IEEE Latin-American Test Symposium, 2018

Probability aware fault-injection approach for SER estimation.
Proceedings of the 19th IEEE Latin-American Test Symposium, 2018

Using FPGA self-produced transients to emulate SETs for SER estimation.
Proceedings of the 19th IEEE Latin-American Test Symposium, 2018

2017
A tolerant JPEG-LS image compressor foreseeing COTS FPGA implementation.
Microprocess. Microsystems, 2017

2016
Proposal of hardware-in-the-loop control platform for small fixed-wing UAVs.
Proceedings of the Annual IEEE Systems Conference, 2016

FPGA implementation of optimized XBM specifications by transformation for AFSMs.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

Impact evaluation of logic blocks configuration on FPGA's soft error rate estimation.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2014
Using FPGAs to implement asynchronous pipelines.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

2012
Analysis of the error susceptibility of a field programmable gate array-based image compressor through random event injection simulation.
IET Comput. Digit. Tech., 2012

2010
A Synthesis-Oriented VHDL Course.
ACM Trans. Comput. Educ., 2010

A low complexity image compression solution for onboard space applications.
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010

2009
Power Quality Monitoring Controlled Through Low-Cost Modules.
IEEE Trans. Instrum. Meas., 2009

2007
Adaptive Kalman Filter for Time Synchronization over Packet-Switched Networks: An Heuristic Approach.
Proceedings of the Second International Conference on COMmunication System softWAre and MiddlewaRE (COMSWARE 2007), 2007

2002
A Low-Cost FPGA Implementation of the Advanced Encryption Standard Algorithm.
Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002

2001
A Two-Input, One-Output Bit-Scalable Architecture for Fuzzy Processors.
IEEE Des. Test Comput., 2001

2000
A Bit Scalable Architecture for Fuzzy Processors with Three Inputs and a Flexible Fuzzification Unit.
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000


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