Roberto Canegallo

Orcid: 0000-0002-3381-0697

According to our database1, Roberto Canegallo authored at least 54 papers between 1995 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
A Temperature-Robust Envelope Detector Receiving OOK-Modulated Signals for Low-Power Applications.
Sensors, October, 2024

2023
A Threshold Voltage Generator Circuit with Automatic Refresh and Dynamic Updating for Ultra-Low-Power Continuous-Time Comparators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
Phase Change Memories in Smart Sensing Solutions for Structural Health Monitoring.
J. Comput. Civ. Eng., 2022

Design and Characterization of an Active Low-Pass Envelope Detector for Wake-Up Radio Receivers.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022

Phase-Change Memory in Neural Network Layers with Measurements-based Device Models.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A 54.8-nW, 256-bit Codeword Temperature-Robust Wake-Up Receiver minimizing False Wake-Ups for Ultra-Low-Power IoT Systems.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

An embedded PCM Peripheral Unit adding Analog MAC In-Memory Computing Feature addressing Non-linearity and Time Drift Compensation.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2021
The X-Hall Sensor: Toward Integrated Broadband Current Sensing.
IEEE Trans. Instrum. Meas., 2021

Compressed Sensing by Phase Change Memories: Coping with Encoder non-Linearities.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
A Fully Programmable eFPGA-Augmented SoC for Smart Power Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

A Clockless Temperature-Compensated Nanowatt Analog Front-End for Wake-Up Radios Based on a Band-Pass Envelope Detector.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Experimental Assessment of a Broadband Current Sensor based on the X-Hall Architecture.
Proceedings of the 2020 IEEE International Instrumentation and Measurement Technology Conference, 2020

Nanowatt Clock and Data Recovery for Ultra-Low Power Wake-Up Based Receivers.
Proceedings of the 2020 International Conference on Embedded Wireless Systems and Networks, 2020

2019
BEE-DRONES: Energy-efficient Data Collection on Wake-Up Radio-based Wireless Sensor Networks.
Proceedings of the IEEE INFOCOM 2019, 2019

A Broadband Current Sensor based on the X-Hall Architecture.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2018
Nanowatt Wake-Up Radios: Discrete-Components and Integrated Architectures.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Dual-Mode Wake-Up Nodes for IoT Monitoring Applications: Measurements and Algorithms.
Proceedings of the 2018 IEEE International Conference on Communications, 2018

Wake-Up Radio Impact in Self-Sustainability of Sensor and Actuator Wireless Nodes in Smart Home Applications.
Proceedings of the Ninth International Green and Sustainable Computing Conference, 2018

From Heterogeneous Sensor Networks to Integrated Software Services: Design and Implementation of a Semantic Architecture for the Internet of Things at ARCES@UNIBO.
Proceedings of the 23rd Conference of Open Innovations Association, 2018

PV Cell Characteristic Extraction to Verify Power Transfer Efficiency in Indoor Harvesting System.
Proceedings of the 23rd IEEE International Workshop on Computer Aided Modeling and Design of Communication Links and Networks, 2018

2017
A Long-Distance RF-Powered Sensor Node with Adaptive Power Management for IoT Applications.
Sensors, 2017

2016
A self-powered WSAN for energy efficient heat distribution.
Proceedings of the IEEE Sensors Applications Symposium, 2016

A 2 MS/s 10A Hall current sensor SoC with digital compressive sensing encoder in 0.16 µm BCD.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2015
A 40 nm CMOS I/O Pad Design With Embedded Capacitive Coupling Receiver for Non-Contact Wafer Probe Test.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014
Multicore Signal Processing Platform With Heterogeneous Configurable Hardware Accelerators.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Energy and Latency Optimization in NEM Relay-Based Digital Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Soft-core eFPGA for Smart Power applications.
Proceedings of the 2014 International Symposium on System-on-Chip, 2014

2011
Automatic Compensation of the Voltage Attenuation in 3-D Interconnection Based on Capacitive Coupling.
IEEE J. Solid State Circuits, 2011

Input/Output Pad for Direct Contact and Contactless Testing.
Proceedings of the 16th European Test Symposium, 2011

2010
Characterization of chip-to-chip wireless interconnections based on capacitive coupling.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

3D system on chip memory interface based on modeled capacitive coupling interconnections.
Proceedings of the IEEE International Conference on 3D System Integration, 2010

2009
3D capacitive transmission of analog signals with automatic compensation of the voltage attenuation.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

System on chip with 1.12mW-32Gb/s AC-coupled 3D memory interface.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

Chip-to-chip communication based on capacitive coupling.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

2008
3-D Capacitive Interconnections With Mono- and Bi-Directional Capabilities.
IEEE J. Solid State Circuits, 2008

2007
3-D Capacitive Interconnections for Wafer-Level and Die-Level Assembly.
IEEE J. Solid State Circuits, 2007

3D Capacitive Interconnections with Mono- and Bi-Directional Capabilities.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

3D Capacitive Interconnections for High Speed Interchip Communication.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
Three dimensional silicon integration.
PhD thesis, 2006

Yield prediction for 3D capacitive interconnections.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

2005
A low-power system-on-chip for the documentation of road accidents.
IEEE Trans. Circuits Syst. Video Technol., 2005

Low leakage design of LUT-based FPGAs.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

Electrical measurement of alignment for 3D stacked chips.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

A 0.14mW/Gbps high-density capacitive interface for 3D system integration.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
Low leakage circuit design for FPGAs.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

A XiRisc-based SoC for embedded DSP applications.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003
A dynamically reconfigurable monolithic CMOS pressure sensor for smart fabric.
IEEE J. Solid State Circuits, 2003

A VLIW processor with reconfigurable instruction set for embedded applications.
IEEE J. Solid State Circuits, 2003

A Reconfigurable Processor Architecture and Software Development Environment for Embedded Systems.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

2001
Low power techniques for flash memories.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A system-on-chip for pressure-sensitive fabric.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

1999
Analog sense amplifiers for high density NOR flash memories.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1997
Words Recognition using Associative Memory.
Proceedings of the 4th International Conference Document Analysis and Recognition (ICDAR '97), 1997

1995
Ultra-low-power analog associative memory core using flash-EEPROM-based programmable capacitors.
Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995


  Loading...