Robert Wille

Quantum, July, 2023

Simulation Paths for Quantum Circuit Simulation With Decision Diagrams What to Learn From Tensor Networks, and What Not.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

A Comprehensive Survey on Electronic Design Automation and Graph Neural Networks: Theory and Applications.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., March, 2023

Noise-Aware Quantum Circuit Simulation With Decision Diagrams.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2023

Dataset containing raw threshold and runtime simulation data for a paper evaluation on decoding quantum color codes.

[BibT_eX]

[DOI]

Lucas Berent

Peter-Jan H. S. Derks

Jens Eisert

Dataset, March, 2023

Channel Routing for Microfluidic Devices: A Comprehensive and Accessible Design Tool.

[BibT_eX]

[DOI]

Philipp Ebner

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023

Deep Reinforcement Learning for Optimization at Early Design Stages.

[BibT_eX]

[DOI]

José Antonio Arjona-Medina

Jin Hwa Lee

IEEE Des. Test, February, 2023

Design Automation for Continuous-Flow Lab-on-a-Chip Systems: A One-Pass Paradigm.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

Hybrid Circuit Mapping: Leveraging the Full Spectrum of Computational Capabilities of Neutral Atom Quantum Computers.

[BibT_eX]

[DOI]

CoRR, 2023

Atomic Defect-Aware Physical Design of Silicon Dangling Bond Logic on the H-Si(100)2x1 Surface.

[BibT_eX]

[DOI]

CoRR, 2023

Analog information decoding of bosonic quantum LDPC codes.

[BibT_eX]

[DOI]

CoRR, 2023

Accelerating CFD Simulations of Microfluidic Devices by Exploiting Higher Levels of Abstraction.

[BibT_eX]

[DOI]

Michel Takken

CoRR, 2023

Computational Capabilities and Compiler Development for Neutral Atom Quantum Processors: Connecting Tool Developers and Hardware Experts.

[BibT_eX]

[DOI]

CoRR, 2023

Temporal Patience: Efficient Adaptive Deep Learning for Embedded Radar Data Processing.

[BibT_eX]

[DOI]

CoRR, 2023

Design Tasks and Their Complexity for Hybrid Level 3 of the European Train Control System.

[BibT_eX]

[DOI]

CoRR, 2023

Detection of Sensor-To-Sensor Variations using Explainable AI.

[BibT_eX]

[DOI]

CoRR, 2023

Tensor Networks or Decision Diagrams? Guidelines for Classical Quantum Circuit Simulation.

[BibT_eX]

[DOI]

CoRR, 2023

Automatic Implementation and Evaluation of Error-Correcting Codes for Quantum Computing: An Open-Source Framework for Quantum Error Correction.

[BibT_eX]

[DOI]

Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

Efficient Implementation of LIMDDs for Quantum Circuit Simulation.

[BibT_eX]

[DOI]

Proceedings of the Model Checking Software - 29th International Symposium, 2023

Predicting Good Quantum Circuit Compilation Options.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Quantum Software, 2023

Recommending Solution Paths for Solving Optimization Problems with Quantum Computing.

[BibT_eX]

[DOI]

Jeanette Miriam Lorenz

Proceedings of the IEEE International Conference on Quantum Software, 2023

Compression of Qubit Circuits: Mapping to Mixed-Dimensional Quantum Systems.

[BibT_eX]

[DOI]

Kevin Mato

Proceedings of the IEEE International Conference on Quantum Software, 2023

Towards the Munich Quantum Software Stack: Enabling Efficient Access and Tool Support for Quantum Computers.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

Towards Hamiltonian Simulation with Decision Diagrams.

[BibT_eX]

[DOI]

Aaron Sander

Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

A Hybrid Classical Quantum Computing Approach to the Satellite Mission Planning Problem.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

Reducing the Compilation Time of Quantum Circuits Using Pre-Compilation on the Gate Level.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

Depth-Optimal Synthesis of Clifford Circuits with SAT Solvers.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

Mixed-Dimensional Quantum Circuit Simulation with Decision Diagrams.

[BibT_eX]

[DOI]

Kevin Mato

Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

Reducing the Complexity of Operational Domain Computation in Silicon Dangling Bond Logic.

[BibT_eX]

[DOI]

Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, 2023

Post-Layout Optimization for Field-coupled Nanotechnologies.

[BibT_eX]

[DOI]

Simon Toni Hofmann

Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, 2023

Minimal Design of SiDB Gates: An Optimal Basis for Circuits Based on Silicon Dangling Bonds.

[BibT_eX]

[DOI]

Jan Drewniok

Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, 2023

An IoT-Based Anomaly Detection and Identification Approach for Gas Sensor Networks.

[BibT_eX]

[DOI]

Sebastian A. Schober

Cecilia Carbonelli

Proceedings of the 2023 IEEE International Workshop on Metrology for Industry 4.0 & IoT, 2023

Multi-Task Cross-Modality Attention-Fusion for 2D Object Detection.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Conference on Intelligent Transportation Systems, 2023

Versatile Signal Distribution Networks for Scalable Placement and Routing of Field-coupled Nanocomputing Technologies.

[BibT_eX]

[DOI]

Benjamin Hien

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

MQT QMAP: Efficient Quantum Circuit Mapping.

[BibT_eX]

[DOI]

Proceedings of the 2023 International Symposium on Physical Design, 2023

Towards an Automated Framework for Realizing Quantum Computing Solutions.

[BibT_eX]

[DOI]

Proceedings of the 53rd IEEE International Symposium on Multiple-Valued Logic, 2023

Optimized Density Matrix Representations : Improving the Basis for Noise-Aware Quantum Circuit Design Tools.

[BibT_eX]

[DOI]

Proceedings of the 53rd IEEE International Symposium on Multiple-Valued Logic, 2023

Analysis of Liquid Morphologies in Curved Open Microchannels.

[BibT_eX]

[DOI]

Proceedings of the 2023 IEEE SENSORS, Vienna, Austria, October 29 - Nov. 1, 2023, 2023

MEET: A Monte Carlo Exploration-Exploitation Trade-Off for Buffer Sampling.

[BibT_eX]

[DOI]

Julius Ott

Jose A. Arjona-Medina

Enrico Rinaldi

Gianfranco Mauro

Daniela Sanchez Lopera

Proceedings of the IEEE International Conference on Acoustics, 2023

Introducing QRogue: Teaching Quantum Computing Using a Rogue-like Game Concept.

[BibT_eX]

[DOI]

Michael Artner

Guenter Wallner

Proceedings of the 18th International Conference on the Foundations of Digital Games, 2023

Efficient Simulation of Droplet Merging in Channel-Based Microfluidic Devices.

[BibT_eX]

[DOI]

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

CFD for Microfluidics: A Workflow for Setting Up the Simulation of Microfluidic Devices.

[BibT_eX]

[DOI]

Philipp Ebner

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

Design Automation for Cryogenic CMOS Circuits.

[BibT_eX]

[DOI]

Victor M. van Santen

Florian Klemme

Shivendra Singh Parihar

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Compiler Optimization for Quantum Computing Using Reinforcement Learning.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Late Breaking Results From Hybrid Design Automation for Field-coupled Nanotechnologies.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

An ASP Approach for the Synthesis of CNOT Minimal Quantum Circuits.

[BibT_eX]

[DOI]

Carla Piazza

Riccardo Romanello

Proceedings of the 38th Italian Conference on Computational Logic, 2023

A Symbolic Design Method for ETCS Hybrid Level 3 at Different Degrees of Accuracy.

[BibT_eX]

[DOI]

Stefan Engels

Proceedings of the 23rd Symposium on Algorithmic Approaches for Transportation Modelling, 2023

A SAT Encoding for Optimal Clifford Circuit Synthesis.

[BibT_eX]

[DOI]

Sarah Schneider

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

Equivalence Checking of Parameterized Quantum Circuits: Verifying the Compilation of Variational Quantum Algorithms.

[BibT_eX]

[DOI]

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

Compilation of Entangling Gates for High-Dimensional Quantum Systems.

[BibT_eX]

[DOI]

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

Exploiting Reversible Computing for Verification: Potential, Possible Paths, and Consequences.

[BibT_eX]

[DOI]

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

Software Tools for Decoding Quantum Low-Density Parity-Check Codes.

[BibT_eX]

[DOI]

Lucas Berent

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022

MMFT Droplet Simulator: Efficient Simulation of Droplet-based Microfluidic Devices.

[BibT_eX]

[DOI]

Florina Costamoling

Softw. Impacts, December, 2022

SyReC Synthesizer: An MQT tool for synthesis of reversible circuits.

[BibT_eX]

[DOI]

Softw. Impacts, December, 2022

A Generic Sample Preparation Approach for Different Microfluidic Labs-on-Chips.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Accurate and Robust Malware Detection: Running XGBoost on Runtime Data From Performance Counters.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Simulation of Pressure-Driven and Channel-Based Microfluidics on Different Abstract Levels: A Case Study.

[BibT_eX]

[DOI]

Michel Takken

Sensors, 2022

Introduction to the Special Issue on Design Automation for Quantum Computing.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2022

Equivalence Checking of Quantum Circuits With the ZX-Calculus.

[BibT_eX]

[DOI]

José Augusto Miranda Nacif

IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

Three-Input NPN Class Gate Library for Atomic Silicon Quantum Dots.

[BibT_eX]

[DOI]

IEEE Des. Test, 2022

On Optimal Subarchitectures for Quantum Circuit Mapping.

[BibT_eX]

[DOI]

CoRR, 2022

Simulation Paths for Quantum Circuit Simulation with Decision Diagrams.

[BibT_eX]

[DOI]

CoRR, 2022

Characteristics of reversible circuits for error detection.

[BibT_eX]

[DOI]

Richard Kueng

Array, 2022

Automatic Design of Microfluidic Gradient Generators.

[BibT_eX]

[DOI]

Tina Mitteramskogler

Marcus A. Hintermüller

Bernhard Jakoby

IEEE Access, 2022

Towards a SAT Encoding for Quantum Circuits: A Journey From Classical Circuits to Clifford Circuits and Beyond.

[BibT_eX]

[DOI]

Lucas Berent

Proceedings of the 25th International Conference on Theory and Applications of Satisfiability Testing, 2022

Optimal Railway Routing Using Virtual Subsections.

[BibT_eX]

[DOI]

Proceedings of the Reliability, Safety, and Security of Railway Systems. Modelling, Analysis, Verification, and Certification, 2022

Reordering Decision Diagrams for Quantum Computing Is Harder Than You Might Think.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 14th International Conference, 2022

Adaptive Compilation of Multi-Level Quantum Operations.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2022

Efficient Multi-Path Signal Routing for Field-coupled Nanotechnologies.

[BibT_eX]

[DOI]

Proceedings of the 17th ACM International Symposium on Nanoscale Architectures, 2022

Exploiting the Third Dimension: Stackable Quantum-dot Cellular Automata.

[BibT_eX]

[DOI]

Willem Lambooy

Proceedings of the 17th ACM International Symposium on Nanoscale Architectures, 2022

Exact Mapping of Quantum Circuit Partitions to Building Blocks of the SAQIP Architecture.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

Compact High-Performance Vibration Sensor Based on Single-Backplate MEMS Technology.

[BibT_eX]

[DOI]

Proceedings of the 2022 IEEE Sensors, Dallas, TX, USA, October 30 - Nov. 2, 2022, 2022

Cross-modal Learning of Graph Representations using Radar Point Cloud for Long-Range Gesture Recognition.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE Sensor Array and Multichannel Signal Processing Workshop, 2022

Utilizing Explainable AI for improving the Performance of Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE International Conference on Machine Learning and Applications, 2022

Uncertainty-based Meta-Reinforcement Learning for Robust Radar Tracking.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE International Conference on Machine Learning and Applications, 2022

Label-Aware Ranked Loss for Robust People Counting Using Automotive In-Cabin Radar.

[BibT_eX]

[DOI]

Daniela Sanchez Lopera

Avik Santra

Proceedings of the IEEE International Conference on Acoustics, 2022

Twenty Years of Successful Translational Research: A Case Study of Three COMET Centers.

[BibT_eX]

[DOI]

Proceedings of the Database and Expert Systems Applications - DEXA 2022 Workshops, 2022

A Concept Towards Pressure-Controlled Microfluidic Networks.

[BibT_eX]

[DOI]

Proceedings of the 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2022

Comprehensive and Accessible Channel Routing for Microfluidic Devices.

[BibT_eX]

[DOI]

Philipp Ebner

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Exploiting Arbitrary Paths for the Simulation of Quantum Circuits with Decision Diagrams.

[BibT_eX]

[DOI]

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

The basis of design tools for quantum computing: arrays, decision diagrams, tensor networks, and ZX-calculus.

[BibT_eX]

[DOI]

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Hexagons are the bestagons: design automation for silicon dangling bond logic.

[BibT_eX]

[DOI]

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Equivalence checking paradigms in quantum circuit design: a case study.

[BibT_eX]

[DOI]

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Handling non-unitaries in quantum circuit equivalence checking.

[BibT_eX]

[DOI]

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Gas Discrimination Analysis of Neural Network Algorithms for a Graphene-Based Electronic Nose.

[BibT_eX]

[DOI]

Sebastian A. Schober

Cecilia Carbonelli

Proceedings of the IEEE 9th International Conference on Computational Intelligence and Virtual Environments for Measurement Systems and Applications, 2022

Improving the Robustness of Microfluidic Networks.

[BibT_eX]

[DOI]

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

Limiting the Search Space in Optimal Quantum Circuit Mapping.

[BibT_eX]

[DOI]

Sarah Schneider

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021

Data for a mapping study about the usage of MDE in Safety and Security Domain.

[BibT_eX]

[DOI]

Dataset, November, 2021

Data for a mapping study about the usage of MDE in Safety and Security Domain.

[BibT_eX]

[DOI]

Dataset, November, 2021

Robust Multi-Target Sample Preparation on MEDA Biochips Obviating Waste Production.

[BibT_eX]

[DOI]

Tapalina Banerjee

ACM Trans. Design Autom. Electr. Syst., 2021

Efficient One-pass Synthesis for Digital Microfluidic Biochips.

[BibT_eX]

[DOI]

Naser Mohammadzadeh

ACM Trans. Design Autom. Electr. Syst., 2021

How Secure Are Checkpoint-Based Defenses in Digital Microfluidic Biochips?

[BibT_eX]

[DOI]

Mohammed Shayan

Sukanta Bhattacharjee

Ramesh Karri

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Automatic Design of Droplet-Based Microfluidic Ring Networks.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Exploring the Potential Benefits of Alternative Quantum Computing Architectures.

[BibT_eX]

[DOI]

Gerhard W. Dueck

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Advanced Equivalence Checking for Quantum Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

QCEC: A JKQ tool for quantum circuit equivalence checking.

[BibT_eX]

[DOI]

Softw. Impacts, 2021

Quantum k-community detection: algorithm proposals and cross-architectural evaluation.

[BibT_eX]

[DOI]

Felix Gemeinhardt

Manuel Wimmer

Quantum Inf. Process., 2021

An ant colony based mapping of quantum circuits to nearest neighbor architectures.

[BibT_eX]

[DOI]

Integr., 2021

Towards Verification of Dynamic Quantum Circuits.

[BibT_eX]

[DOI]

CoRR, 2021

Efficient Construction of Functional Representations for Quantum Algorithms.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 13th International Conference, 2021

Decision Diagrams for Quantum Measurements with Shallow Circuits.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2021

Hybrid Schrödinger-Feynman Simulation of Quantum Circuits With Decision Diagrams.

[BibT_eX]

[DOI]

Hartwig Bauer

Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2021

Practical Assessment of Payload- Header Switching in Microfluidic Networks.

[BibT_eX]

[DOI]

Proceedings of the NANOCOM '21: The Eighth Annual ACM International Conference on Nanoscale Computing and Communication, Virtual Event, Italy, September 7, 2021

Performance Aspects of Correctness-oriented Synthesis Flows.

[BibT_eX]

[DOI]

Proceedings of the 9th International Conference on Model-Driven Engineering and Software Development, 2021

A Survey of Graph Neural Networks for Electronic Design Automation.

[BibT_eX]

[DOI]

Daniela Sanchez Lopera

Proceedings of the 3rd ACM/IEEE Workshop on Machine Learning for CAD, 2021

Lessons Learnt in the Implementation of Quantum Circuit Simulation Using Decision Diagrams.

[BibT_eX]

[DOI]

Proceedings of the 51st IEEE International Symposium on Multiple-Valued Logic, 2021

SMT-Based Placement for System-on-Chip Design.

[BibT_eX]

[DOI]

Sven Wenzek

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

BigIntegr: One-Pass Architectural Synthesis for Continuous-Flow Microfluidic Lab-on-a-Chip Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Towards Automatic Design and Verification for Level 3 of the European Train Control System.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Visualizing Decision Diagrams for Quantum Computing (Special Session Summary).

[BibT_eX]

[DOI]

Michael Artner

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Generic Sample Preparation for Different Microfluidic Platforms.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Exact Physical Design of Quantum Circuits for Ion-Trap-based Quantum Architectures.

[BibT_eX]

[DOI]

Naser Mohammadzadeh

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

As Accurate as Needed, as Efficient as Possible: Approximations in DD-based Quantum Circuit Simulation.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Stochastic Quantum Circuit Simulation Using Decision Diagrams.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

One-pass Synthesis for Field-coupled Nanocomputing Technologies.

[BibT_eX]

[DOI]

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

Exploiting Quantum Teleportation in Quantum Circuit Mapping.

[BibT_eX]

[DOI]

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

Accurate and Efficient Simulation of Microfluidic Networks.

[BibT_eX]

[DOI]

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

Random Stimuli Generation for the Verification of Quantum Circuits.

[BibT_eX]

[DOI]

Richard Kueng

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

Simulation and Design of Quantum Circuits.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation: Extending Horizons of Computing, 2020

Harnessing the Granularity of Micro-Electrode-Dot-Array Architectures for Optimizing Droplet Routing in Biochips.

[BibT_eX]

[DOI]

Pushpita Roy

Ansuman Banerjee

ACM Trans. Design Autom. Electr. Syst., 2020

On the Difficulty of Inserting Trojans in Reversible Computing Architectures.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2020

Multicontrol: Advanced Control-Logic Synthesis for Flow-Based Microfluidic Biochips.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Overcoming the Tradeoff Between Accuracy and Compactness in Decision Diagrams for Quantum Computation.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Improved Mapping of Quantum Circuits to IBM QX Architectures.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Automatic Droplet Sequence Generation for Microfluidic Networks With Passive Droplet Routing.

[BibT_eX]

[DOI]

Werner Haselmayr

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Robustness Analysis for Droplet-Based Microfluidic Networks.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Storage-Aware Algorithms for Dilution and Mixture Preparation With Flow-Based Lab-on-Chip.

[BibT_eX]

[DOI]

Sukanta Bhattacharjee

Juinn-Dar Huang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Accurate Cost Estimation of Memory Systems Utilizing Machine Learning and Solutions from Computer Vision for Design Automation.

[BibT_eX]

[DOI]

Edoardo Mosca

Michael Werner

IEEE Trans. Computers, 2020

Advanced exact synthesis of Clifford+T circuits.

[BibT_eX]

[DOI]

José Augusto Miranda Nacif

Quantum Inf. Process., 2020

On the impact of the synchronization constraint and interconnections in quantum-dot cellular automata.

[BibT_eX]

[DOI]

Ricardo Santos Ferreira

Omar Paranaiba Vilela Neto

Microprocess. Microsystems, 2020

Modeling and simulation of electrophoretic deposition coatings.

[BibT_eX]

[DOI]

J. Comput. Sci., 2020

Near Zero-Energy Computation Using Quantum-Dot Cellular Automata.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2020

An efficient memristor crossbar architecture for mapping Boolean functions using Binary Decision Diagrams (BDD).

[BibT_eX]

[DOI]

Phrangboklang Lyngton Thangkhiew

Integr., 2020

A PCISPH implementation using distributed multi-GPU acceleration for simulating industrial engineering applications.

[BibT_eX]

[DOI]

Int. J. High Perform. Comput. Appl., 2020

Design and realization of flexible droplet-based lab-on-a-chip devices.

[BibT_eX]

[DOI]

Elektrotech. Informationstechnik, 2020

Model-driven Engineering of Safety and Security Systems: A Systematic Mapping Study.

[BibT_eX]

[DOI]

Atif Mashkoor

Alexander Egyed

CoRR, 2020

Post Synthesis-Optimization of Reversible Circuit using Template Matching.

[BibT_eX]

[DOI]

Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

Verifying Results of the IBM Qiskit Quantum Circuit Compilation Flow.

[BibT_eX]

[DOI]

Rudy Raymond

Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2020

Safety First: About the Detection of Arithmetic Overflows in Hardware Design Specifications.

[BibT_eX]

[DOI]

Proceedings of the Model-Driven Engineering and Software Development, 2020

Integer Overflow Detection in Hardware Designs at the Specification Level.

[BibT_eX]

[DOI]

Proceedings of the 8th International Conference on Model-Driven Engineering and Software Development, 2020

Automatic compiler optimization on embedded software through k-means clustering.

[BibT_eX]

[DOI]

Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020

Cost Optimization at Early Stages of Design Using Deep Reinforcement Learning.

[BibT_eX]

[DOI]

Jiapeng Zheng

Jose A. Arjona-Medina

Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020

Bail on Balancing: An Alternative Approach to the Physical Design of Field-Coupled Nanocomputing Circuits.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

Arrays vs. Decision Diagrams: A Case Study on Quantum Circuit Simulators.

[BibT_eX]

[DOI]

Proceedings of the 50th IEEE International Symposium on Multiple-Valued Logic, 2020

Efficient Implementation of Nearest Neighbor Quantum Circuits Using Clustering with Genetic Algorithm.

[BibT_eX]

[DOI]

Proceedings of the 50th IEEE International Symposium on Multiple-Valued Logic, 2020

One-pass Synthesis for Digital Microfluidic Biochips: A Survey.

[BibT_eX]

[DOI]

Proceedings of the 3rd International Symposium on Devices, Circuits and Systems, 2020

Efficient and Correct Compilation of Quantum Circuits.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Towards Drift Modeling of Graphene-Based Gas Sensors Using Stochastic Simulation Techniques.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE Sensors, Rotterdam, The Netherlands, October 25-28, 2020, 2020

JKQ: JKU Tools for Quantum Computing.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Considering Decoherence Errors in the Simulation of Quantum Circuits Using Decision Diagrams.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Cost Estimation for Configurable Model-Driven SoC Designs Using Machine Learning.

[BibT_eX]

[DOI]

Edoardo Mosca

Michael Werner

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

ToPoliNano and fiction: Design Tools for Field-coupled Nanocomputing.

[BibT_eX]

[DOI]

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

YASSi: Yet Another Symbolic Simulator Large (Tool Demo).

[BibT_eX]

[DOI]

Pablo González de Aledo

Proceedings of the Database and Expert Systems Applications, 2020

Verification Runtime Analysis: Get the Most Out of Partial Verification.

[BibT_eX]

[DOI]

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Towards Exploring the Potential of Alternative Quantum Computing Architectures.

[BibT_eX]

[DOI]

Gerhard W. Dueck

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Realizing Quantum Algorithms on Real Quantum Computing Devices.

[BibT_eX]

[DOI]

Carmen G. Almudéver

Lingling Lao

Gian Giacomo Guerreschi

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Verification for Field-coupled Nanocomputing Circuits.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Just Like the Real Thing: Fast Weak Simulation of Quantum Computation.

[BibT_eX]

[DOI]

Igor L. Markov

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

The Power of Simulation for Equivalence Checking in Quantum Computing.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Approximation of Quantum States Using Decision Diagrams.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

Concurrency in DD-based Quantum Circuit Simulation.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

Improved DD-based Equivalence Checking of Quantum Circuits.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

Towards Automatic Hardware Synthesis from Formal Specification to Implementation.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019

Reversible Circuits: IC/IP Piracy Attacks and Countermeasures.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2019

Determining Application-Specific Knowledge for Improving Robustness of Sequential Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2019

Passive Droplet Control in Two-Dimensional Microfluidic Networks.

[BibT_eX]

[DOI]

IEEE Trans. Mol. Biol. Multi Scale Commun., 2019

Locking the Design of Building Blocks for Quantum Circuits.

[BibT_eX]

[DOI]

Samah Mohamed Saeed

Ramesh Karri

ACM Trans. Embed. Comput. Syst., 2019

Advanced Simulation of Quantum Computations.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

An Efficient Methodology for Mapping Quantum Circuits to the IBM QX Architectures.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Error-Oblivious Sample Preparation With Digital Microfluidic Lab-on-Chip.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Automated Dimensioning of Networked Labs-on-Chip.

[BibT_eX]

[DOI]

Werner Haselmayr

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Passive droplet control in microfluidic networks: A survey and new perspectives on their practical realization.

[BibT_eX]

[DOI]

Nano Commun. Networks, 2019

Using Machine Learning for predicting area and Firmware metrics of hardware designs from abstract specifications.

[BibT_eX]

[DOI]

Tobias Fritz

Microprocess. Microsystems, 2019

Faster manipulation of large quantum circuits using wire label reference diagrams.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2019

Placement and Routing for Tile-based Field-coupled Nanocomputing Circuits Is NP-complete (Research Note).

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2019

Identification of Synthesis Approaches for IP/IC Piracy of Reversible Circuits.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2019

Advanced Simulation of Droplet Microfluidics.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2019

fiction: An Open Source Framework for the Design of Field-coupled Nanocomputing Circuits.

[BibT_eX]

[DOI]

CoRR, 2019

Dilution with Digital Microfluidic Biochips: How Unbalanced Splits Corrupt Target-Concentration.

[BibT_eX]

[DOI]

CoRR, 2019

Improved Look-Ahead Approaches for Nearest Neighbor Synthesis of 1D Quantum Circuits.

[BibT_eX]

[DOI]

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

Evaluating the Flexibility of A* for Mapping Quantum Circuits.

[BibT_eX]

[DOI]

Hartwig Bauer

Proceedings of the Reversible Computation - 11th International Conference, 2019

Simulating Industrial Electrophoretic Deposition on Distributed Memory Architectures.

[BibT_eX]

[DOI]

Kevin Verma

Johannes Oder

Proceedings of the 27th Euromicro International Conference on Parallel, 2019

Information Encoding in Droplet-Based Microfluidic Systems: First Practical Study.

[BibT_eX]

[DOI]

Proceedings of the Sixth Annual ACM International Conference on Nanoscale Computing and Communication, 2019

Did We Test Enough? Functional Coverage for Post-Silicon Validation.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference in Asia, 2019

Ignore Clocking Constraints: An Alternative Physical Design Methodology for Field-Coupled Nanotechnologies.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Focus on What is Needed: Area and Power Efficient FPGAs Using Turn-Restricted Switch Boxes.

[BibT_eX]

[DOI]

Fatemeh Serajeh-hassani

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Test Your Test Programs Pre-Silicon: A Virtual Test Methodology for Industrial Design Flows.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

One Additional Qubit is Enough: Encoded Embeddings for Boolean Components in Quantum Circuits.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL), 2019

Four-Valued Logic in UML/OCL Models: A "Playground" for the MVL Community.

[BibT_eX]

[DOI]

Judith Przigoda

Proceedings of the 2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL), 2019

Flow-Based Passive Microfluidic Architecture for Homogeneous Mixing.

[BibT_eX]

[DOI]

Tapalina Banerjee

Proceedings of the 9th International Symposium on Embedded Computing and System Design, 2019

Exact Stimuli Minimization for Simulation-Based Verification.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

How to Efficiently Handle Complex Values? Implementing Decision Diagrams for Quantum Computing.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2019

Towards HDL-based Synthesis of Reversible Circuits with No Additional Lines.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2019

Generic Error Localization for the Electronic System Level.

[BibT_eX]

[DOI]

Pablo González de Aledo

Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

Matrix-Vector vs. Matrix-Matrix Multiplication: Potential in DD-based Simulation of Quantum Computations.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Accuracy and Compactness in Decision Diagrams for Quantum Computation.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

IBM's Qiskit Tool Chain: Working with and Developing for Real Quantum Computers.

[BibT_eX]

[DOI]

Rod Van Meter

Yehuda Naveh

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Accurate Cost Estimation of Memory Systems Inspired by Machine Learning for Computer Vision.

[BibT_eX]

[DOI]

Martin Manzinger

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Better Late Than Never : Verification of Embedded Systems After Deployment.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Mapping Quantum Circuits to IBM QX Architectures Using the Minimal Number of SWAP and H Operations.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Compiling SU(4) quantum circuits to IBM QX architectures.

[BibT_eX]

[DOI]

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

Design automation for adiabatic circuits.

[BibT_eX]

[DOI]

Michael P. Frank

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

A staircase structure for scalable and efficient synthesis of memristor-aided logic.

[BibT_eX]

[DOI]

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

Robust sample preparation on digital microfluidic biochips.

[BibT_eX]

[DOI]

Zhanwei Zhong

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

Scalable design for field-coupled nanocomputing circuits.

[BibT_eX]

[DOI]

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

Effect of Volumetric Split-Errors on Reactant-Concentration During Sample Preparation with Microfluidic Biochips.

[BibT_eX]

[DOI]

Proceedings of the Advanced Computing and Systems for Security, 2019

2018

One-Pass Design of Reversible Circuits: Combining Embedding and Synthesis for Reversible Logic.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Physical Co-Design of Flow and Control Layers for Flow-Based Microfluidic Biochips.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

An Energy-Aware Model for the Logic Synthesis of Quantum-Dot Cellular Automata.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Design of Application-Specific Architectures for Networked Labs-on-Chips.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Synthesis of circuits based on all-optical Mach-Zehnder Interferometers using Binary Decision Diagrams.

[BibT_eX]

[DOI]

Microelectron. J., 2018

Preface to the Special Issue of the 48th IEEE International Symposium on Multiple Valued Logic.

[BibT_eX]

[DOI]

Martin Lukac

FLAP, 2018

Breaking Landauer's Limit\\Using Quantum-dot Cellular Automata.

[BibT_eX]

[DOI]

CoRR, 2018

NISQ circuit compilers: search space structure and heuristics.

[BibT_eX]

[DOI]

CoRR, 2018

Frame conditions in the automatic validation and verification of UML/OCL models: A symbolic formulation of modifies only statements.

[BibT_eX]

[DOI]

Comput. Lang. Syst. Struct., 2018

Exact Synthesis of Biomolecular Protocols for Multiple Sample Pathways on Digital Microfluidic Biochips.

[BibT_eX]

[DOI]

Mohamed Ibrahim

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

QMDD-Based One-Pass Design of Reversible Logic: Exploring the Available Degree of Freedom (Work-in-Progress Report).

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 10th International Conference, 2018

Comparison of switching principles in microfluidic bus networks.

[BibT_eX]

[DOI]

Proceedings of the 5th ACM International Conference on Nanoscale Computing and Communication, 2018

Generation and Validation of Frame Conditions in Formal Models.

[BibT_eX]

[DOI]

Proceedings of the Model-Driven Engineering and Software Development, 2018

Analyzing Frame Conditions in UML/OCL Models - Consistency Equivalence and Independence.

[BibT_eX]

[DOI]

Proceedings of the 6th International Conference on Model-Driven Engineering and Software Development, 2018

A Novel Approach for Nearest Neighbor Realization of 2D Quantum Circuits.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Generalizing the Concept of Scalable Reversible Circuit Synthesis for Multiple-Valued Logic.

[BibT_eX]

[DOI]

Proceedings of the 48th IEEE International Symposium on Multiple-Valued Logic, 2018

Synthesis of Reversible Circuits Using Conventional Hardware Description Languages.

[BibT_eX]

[DOI]

Proceedings of the 48th IEEE International Symposium on Multiple-Valued Logic, 2018

Parallel Simulation of Electrophoretic Deposition for Industrial Automotive Applications.

[BibT_eX]

[DOI]

Kevin Verma

Luis Ayuso

Proceedings of the 2018 International Conference on High Performance Computing & Simulation, 2018

Quality Assessment of Generated Hardware Designs Using Statistical Analysis and Machine Learning.

[BibT_eX]

[DOI]

Proceedings of the 8th International Workshop on Combinations of Intelligent Methods and Applications co-located with 30th International Conference on Artificial Intelligence Tools (ICTAI 2018), 2018

Multi-channel and fault-tolerant control multiplexing for flow-based microfluidic biochips.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2018

Computer-aided design for quantum computation.

[BibT_eX]

[DOI]

Yehuda Naveh

Proceedings of the International Conference on Computer-Aided Design, 2018

IC/IP piracy assessment of reversible logic.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2018

AMulti-GPU PCISPH Implementation with Efficient Memory Transfers.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE High Performance Extreme Computing Conference, 2018

Automatic Design of Microfluidic Devices.

[BibT_eX]

[DOI]

Proceedings of the 2018 Forum on Specification & Design Languages, 2018

Evaluating the Impact of Interconnections in Quantum-Dot Cellular Automata.

[BibT_eX]

[DOI]

Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

Pushing the number of qubits below the "minimum": Realizing compact boolean components for quantum logic.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Efficient mapping of quantum circuits to the IBM QX architectures.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

An exact method for design exploration of quantum-dot cellular automata.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Improved synthesis of Clifford+T quantum functionality.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Storage-aware sample preparation using flow-based microfluidic Labs-on-Chip.

[BibT_eX]

[DOI]

Sukanta Bhattacharjee

Juinn-Dar Huang

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Exploiting coding techniques for logic synthesis of reversible circuits.

[BibT_eX]

[DOI]

Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

Sound valve-control for programmable microfluidic devices.

[BibT_eX]

[DOI]

Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

Emerging Circuit Technologies: An Overview on the Next Generation of Circuits.

[BibT_eX]

[DOI]

Priyank Kalla

Proceedings of the Advanced Logic Synthesis, 2018

Automated Validation & Verification of UML/OCL Models Using Satisfiability Solvers

[BibT_eX]

[DOI]

Springer, ISBN: 978-3-319-72813-1, 2018

2017

Towards a Verification Flow Across Abstraction Levels Verifying Implementations Against Their Formal Specification.

[BibT_eX]

[DOI]

Pablo González de Aledo

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Microfluidic Biochips: Bridging Biochemistry with Computer Science and Engineering (NII Shonan Meeting 2017-1).

[BibT_eX]

[DOI]

Shigeru Yamashita

Tsung-Yi Ho

NII Shonan Meet. Rep., 2017

Towards quantum reversible ternary coded decimal adder.

[BibT_eX]

[DOI]

Majid Haghparast

Asma Taheri Monfared

Quantum Inf. Process., 2017

Online scheduled execution of quantum circuits protected by surface codes.

[BibT_eX]

[DOI]

Quantum Inf. Comput., 2017

An Automated Approach for Generating and Checking Control Logic for Reversible Hardware Description Language-Based Designs.

[BibT_eX]

[DOI]

Lars Othmer

Michael Kirkedal Thomsen

J. Low Power Electron., 2017

Synthesis of optical circuits using binary decision diagrams.

[BibT_eX]

[DOI]

Integr., 2017

Formal methods for reasoning and uncertainty reduction in evidential grid maps.

[BibT_eX]

[DOI]

Joachim Clemens

Int. J. Approx. Reason., 2017

Advanced Simulation of Quantum Computations: Compact Representation Rather than Hardware Power.

[BibT_eX]

[DOI]

CoRR, 2017

Towards Reverse Engineering Reversible Logic.

[BibT_eX]

[DOI]

CoRR, 2017

Design automation for Labs-on-Chip: A new "playground" for SoC designers.

[BibT_eX]

[DOI]

Bing Li

Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

Improving Synthesis of Reversible Circuits: Exploiting Redundancies in Paths and Nodes of QMDDs.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 9th International Conference, 2017

Exact Global Reordering for Nearest Neighbor Quantum Circuits Using A ^* ∗.

[BibT_eX]

[DOI]

Stefan Gasser

Proceedings of the Reversible Computation - 9th International Conference, 2017

Automatic Test Pattern Generation for Multiple Missing Gate Faults in Reversible Circuits - Work in Progress Report.

[BibT_eX]

[DOI]

Anmol Prakash Surhonne

Anupam Chattopadhyay

Proceedings of the Reversible Computation - 9th International Conference, 2017

Efficient Construction of QMDDs for Irreversible, Reversible, and Quantum Functions.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 9th International Conference, 2017

Test Pattern Generation Effort Evaluation of Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 9th International Conference, 2017

Towards VHDL-Based Design of Reversible Circuits - Work in Progress Report.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 9th International Conference, 2017

Exploiting reversible logic design for implementing adiabatic circuits.

[BibT_eX]

[DOI]

Andreas Rauchenecker

Timm Ostermann

Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017

More than true or false: native support of irregular values in the automatic validation & verification of UML/OCL models.

[BibT_eX]

[DOI]

Proceedings of the 15th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2017

Verifikation von Networked Labs-on-Chip Architekturen.

[BibT_eX]

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2017

BioViz: An Interactive Visualization Engine for the Design of Digital Microfluidic Biochips.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Skipping Embedding in the Design of Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the 47th IEEE International Symposium on Multiple-Valued Logic, 2017

OR-Inverter Graphs for the Synthesis of Optical Circuits.

[BibT_eX]

[DOI]

Proceedings of the 47th IEEE International Symposium on Multiple-Valued Logic, 2017

Extensions to the Reversible Hardware Description Language SyReC.

[BibT_eX]

[DOI]

Proceedings of the 47th IEEE International Symposium on Multiple-Valued Logic, 2017

Towards lightweight satisfiability solvers for self-verification.

[BibT_eX]

[DOI]

Fritjof Bornebusch

Proceedings of the 7th International Symposium on Embedded Computing and System Design, 2017

Identifying Reversible Circuit Synthesis Approaches to Enable IP Piracy Attacks.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Dedicated synthesis for MZI-based optical circuits based on AND-inverter graphs.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Addressing multiple nodes in networked labs-on-chips without payload re-injection.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Communications, 2017

Advanced load balancing for SPH simulations on multi-GPU architectures.

[BibT_eX]

[DOI]

Kevin Verma

Kamil Szewc

Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017

Tagged BDDs: Combining reduction rules from different decision diagram types.

[BibT_eX]

[DOI]

Tom van Dijk

Robert Meolic

Proceedings of the 2017 Formal Methods in Computer Aided Design, 2017

Stochastic Computing Using Droplet-Based Microfluidics.

[BibT_eX]

[DOI]

Werner Haselmayr

Proceedings of the Computer Aided Systems Theory - EUROCAST 2017, 2017

Formulating Model Verification Tasks Prover-Independently as UML Diagrams.

[BibT_eX]

[DOI]

Proceedings of the Modelling Foundations and Applications - 13th European Conference, 2017

An efficient physical design of fully-testable BDD-based circuits.

[BibT_eX]

[DOI]

Andreas Rauchenecker

Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

Taking one-to-one mappings for granted: Advanced logic design of encoder circuits.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Make it reversible: Efficient embedding of non-reversible functions.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Verification of networked Labs-on-Chip architectures.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

A Discrete Model for Networked Labs-on-Chips: Linking the Physical World to Design Automation.

[BibT_eX]

[DOI]

Proceedings of the 54th Annual Design Automation Conference, 2017

Exact routing for micro-electrode-dot-array digital microfluidic biochips.

[BibT_eX]

[DOI]

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

Enhancing robustness of sequential circuits using application-specific knowledge and formal methods.

[BibT_eX]

[DOI]

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

Close-to-optimal placement and routing for continuous-flow microfluidic biochips.

[BibT_eX]

[DOI]

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

QMDDs: Efficient Quantum Function Representation and Manipulation.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Embedding of Large Boolean Functions for Reversible Logic.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2016

Gates vs. Splitters: Contradictory Optimization Objectives in the Synthesis of Optical Circuits.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2016

Reversible Synthesis of Symmetric Functions with a Simple Regular Structure and Easy Testability.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2016

Analyzing Inconsistencies in UML/OCL Models.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2016

SyReC: A hardware description language for the specification and synthesis of reversible circuits.

[BibT_eX]

[DOI]

Integr., 2016

Verifying the structure and behavior in UML/OCL models using satisfiability solvers.

[BibT_eX]

[DOI]

IET Cyper-Phys. Syst.: Theory & Appl., 2016

Guest Editorial Emerging Topics in Multiple-Valued Logic and Its Applications.

[BibT_eX]

[DOI]

IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Reliable quantum circuits have defects.

[BibT_eX]

[DOI]

XRDS, 2016

Improving the Realization of Multiple-Control Toffoli Gates Using the NCVW Quantum Gate Library.

[BibT_eX]

[DOI]

Laxmidhar Biswal

Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

Extracting frame conditions from operation contracts.

[BibT_eX]

[DOI]

Proceedings of the Software Engineering 2016, 2016

From reversible logic to quantum circuits: Logic design for an emerging technology.

[BibT_eX]

[DOI]

Anupam Chattopadhyay

Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Using \pi DDs for Nearest Neighbor Optimization of Quantum Circuits.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 8th International Conference, 2016

Checking Reversibility of Boolean Functions.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 8th International Conference, 2016

Initial Ideas for Automatic Design and Verification of Control Logic in Reversible HDLs - Work in Progress Report.

[BibT_eX]

[DOI]

Lars Othmer

Michael Kirkedal Thomsen

Proceedings of the Reversible Computation - 8th International Conference, 2016

Ground setting properties for an efficient translation of OCL in SMT-based model finding.

[BibT_eX]

[DOI]

Proceedings of the ACM/IEEE 19th International Conference on Model Driven Engineering Languages and Systems, 2016

Integrating an SMT-Based ModelFinder into USE.

[BibT_eX]

[DOI]

Proceedings of the 13th Workshop on Model-Driven Engineering, 2016

Towards a Catalog of Structural and Behavioral Verification Tasks for UML/OCL Models.

[BibT_eX]

[DOI]

Proceedings of the Modellierung 2016, 2.-4. März 2016, Karlsruhe, 2016

Frame conditions in symbolic representations of UML/OCL models.

[BibT_eX]

[DOI]

Proceedings of the 2016 ACM/IEEE International Conference on Formal Methods and Models for System Design, 2016

Clocks vs. instants relations: Verifying CCSL time constraints in UML/MARTE models.

[BibT_eX]

[DOI]

Proceedings of the 2016 ACM/IEEE International Conference on Formal Methods and Models for System Design, 2016

Integrated Synthesis of Linear Nearest Neighbor Ancilla-Free MCT Circuits.

[BibT_eX]

[DOI]

Proceedings of the 46th IEEE International Symposium on Multiple-Valued Logic, 2016

Fault Detection in Parity Preserving Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the 46th IEEE International Symposium on Multiple-Valued Logic, 2016

Logic Synthesis for Quantum State Generation.

[BibT_eX]

[DOI]

Rhitam Datta

Proceedings of the 46th IEEE International Symposium on Multiple-Valued Logic, 2016

Nearest-Neighbor and Fault-Tolerant Quantum Circuit Implementation.

[BibT_eX]

[DOI]

Laxmidhar Biswal

Proceedings of the 46th IEEE International Symposium on Multiple-Valued Logic, 2016

Re-Writing HDL Descriptions for Line-Aware Synthesis of Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the 46th IEEE International Symposium on Multiple-Valued Logic, 2016

Generating and checking control logic in the HDL-based design of reversible circuits.

[BibT_eX]

[DOI]

Lars Othmer

Michael Kirkedal Thomsen

Pierre-Emmanuel Gaillardon

Proceedings of the Sixth International Symposium on Embedded Computing and System Design, 2016

Towards a model-based verification methodology for Complex Swarm Systems (Invited paper).

[BibT_eX]

[DOI]

Proceedings of the Sixth International Symposium on Embedded Computing and System Design, 2016

An improved gate library for logic synthesis of optical circuits.

[BibT_eX]

[DOI]

Proceedings of the Sixth International Symposium on Embedded Computing and System Design, 2016

From biochips to quantum circuits: computer-aided design for emerging technologies.

[BibT_eX]

[DOI]

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Synthesis of approximate coders for on-chip interconnects using reversible logic.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Exploiting inherent characteristics of reversible circuits for faster combinational equivalence checking.

[BibT_eX]

[DOI]

Luca Gaetano Amarù

Giovanni De Micheli

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Look-ahead schemes for nearest neighbor optimization of 1D and 2D quantum circuits.

[BibT_eX]

[DOI]

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015

Scalable One-Pass Synthesis for Digital Microfluidic Biochips.

[BibT_eX]

[DOI]

IEEE Des. Test, 2015

Design of Microfluidic Biochips (Dagstuhl Seminar 15352).

[BibT_eX]

[DOI]

Tsung-Yi Ho

Dagstuhl Reports, 2015

BDD-Based Synthesis for All-Optical Mach-Zehnder Interferometer Circuits.

[BibT_eX]

[DOI]

Proceedings of the 28th International Conference on VLSI Design, 2015

Envisioning self-verification of electronic systems.

[BibT_eX]

[DOI]

Martin Fränzle

Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015

Synthesis of Quantum Circuits for Dedicated Physical Machine Descriptions.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 7th International Conference, 2015

Towards a Cost Metric for Nearest Neighbor Constraints in Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 7th International Conference, 2015

Towards Line-Aware Realizations of Expressions for HDL-Based Synthesis of Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 7th International Conference, 2015

A Unified Formulation of Behavioral Semantics for SysML Models.

[BibT_eX]

[DOI]

Christoph Hilken

Jan Peleska

Proceedings of the MODELSWARD 2015, 2015

Towards an Automatic Approach for Restricting UML/OCL Invariability Clauses.

[BibT_eX]

[DOI]

Proceedings of the 12th Workshop on Model-Driven Engineering, 2015

Checking concurrent behavior in UML/OCL models.

[BibT_eX]

[DOI]

Proceedings of the 18th ACM/IEEE International Conference on Model Driven Engineering Languages and Systems, 2015

Verbesserung der Fehlersuche in inkonsistenten formalen Modellen (Erweiterte Zusammenfassung).

[BibT_eX]

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2015

An Efficient Reduction of Common Control Lines for Reversible Circuit Optimization.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Multiple-Valued Logic, 2015

An Examination of the NCV-|u1 > Quantum Library Based on Minimal Circuits.

[BibT_eX]

[DOI]

Arman Allahyari-Abhari

Proceedings of the 2015 IEEE International Symposium on Multiple-Valued Logic, 2015

From UML/OCL to Base Models: Transformation Concepts for Generic Validation and Verification.

[BibT_eX]

[DOI]

Proceedings of the Theory and Practice of Model Transformations, 2015

Formal Methods for Emerging Technologies.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

A General and Exact Routing Methodology for Digital Microfluidic Biochips.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Reversible computation.

[BibT_eX]

[DOI]

Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015

Leveraging the Analysis for Invariant Independence in Formal System Models.

[BibT_eX]

[DOI]

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Verification-Driven Design Across Abstraction Levels: A Case Study.

[BibT_eX]

[DOI]

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Contradiction Analysis for Inconsistent Formal Models.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015

Automated feature localization for dynamically generated SystemC designs.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Assisted generation of frame conditions for formal models.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

A generic representation of CCSL time constraints for UML/MARTE models.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

Reverse BDD-based synthesis for splitter-free optical circuits.

[BibT_eX]

[DOI]

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

Determining the minimal number of swap gates for multi-dimensional nearest neighbor quantum circuits.

[BibT_eX]

[DOI]

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014

Exact Reordering of Circuit Lines for Nearest Neighbor Quantum Architectures.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Considering nearest neighbor constraints of quantum circuits at the reversible circuit level.

[BibT_eX]

[DOI]

Quantum Inf. Process., 2014

Introduction to the Special Issue on Reversible Computation.

[BibT_eX]

[DOI]

Mehdi Baradaran Tahoori

ACM J. Emerg. Technol. Comput. Syst., 2014

Trading off circuit lines and gate costs in the synthesis of reversible logic.

[BibT_eX]

[DOI]

Integr., 2014

Filmstripping and Unrolling: A Comparison of Verification Approaches for UML and OCL Behavioral Models.

[BibT_eX]

[DOI]

Proceedings of the Tests and Proofs - 8th International Conference, 2014

Determining Cases of Scenarios to Improve Coverage in Simulation-based Verification.

[BibT_eX]

[DOI]

Shuo Yang

Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014

Validating SystemC Implementations Against Their Formal Specifications.

[BibT_eX]

[DOI]

Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014

RevVis: Visualization of Structures and Properties in Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 6th International Conference, 2014

Equivalence Checking in Multi-level Quantum Systems.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 6th International Conference, 2014

Towards a Base Model for UML and OCL Verification.

[BibT_eX]

[DOI]

Proceedings of the 11th Workshop on Model-Driven Engineering, 2014

Generating SystemC Implementations for Clock Constraints Specified in UML/MARTE CCSL.

[BibT_eX]

[DOI]

Judith Peters

Proceedings of the 2014 19th International Conference on Engineering of Complex Computer Systems, 2014

Exact routing for digital microfluidic biochips with temporary blockages.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Automated and quality-driven requirements engineering.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Automatic refinement checking for formal system models.

[BibT_eX]

[DOI]

Proceedings of the 2014 Forum on Specification and Design Languages, 2014

Verifying consistency between activity diagrams and their corresponding OCL contracts.

[BibT_eX]

[DOI]

Proceedings of the 2014 Forum on Specification and Design Languages, 2014

Improving Coverage of Simulation-Based Verification by Dedicated Stimuli Generation.

[BibT_eX]

[DOI]

Shuo Yang

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

Optimizing DD-based synthesis of reversible circuits using negative control lines.

[BibT_eX]

[DOI]

Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

Exact One-pass Synthesis of Digital Microfluidic Biochips.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Optimal SWAP gate insertion for nearest neighbor quantum circuits.

[BibT_eX]

[DOI]

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

Efficient synthesis of quantum circuits implementing clifford group operations.

[BibT_eX]

[DOI]

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

Effect of Negative Control Lines on the Exact Synthesis of Reversible Circuits.

[BibT_eX]

[DOI]

J. Multiple Valued Log. Soft Comput., 2013

Clarification on the Mapping of Reversible Circuits to the NCV-v1 Library.

[BibT_eX]

[DOI]

Zahra Sasanian

CoRR, 2013

On the "Q" in QMDDs: Efficient Representation of Quantum Functionality in the QMDD Data-Structure.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 5th International Conference, 2013

Reversible Circuit Synthesis of Symmetric Functions Using a Simple Regular Structure.

[BibT_eX]

[DOI]

Debesh K. Das

Proceedings of the Reversible Computation - 5th International Conference, 2013

Exploiting Negative Control Lines in the Optimization of Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 5th International Conference, 2013

Reducing the Depth of Quantum Circuits Using Additional Circuit Lines.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 5th International Conference, 2013

The SyReC hardware description language: Enabling scalable synthesis of reversible circuits.

[BibT_eX]

[DOI]

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Generierung von OCL-Ausdrücken aus natürlichsprachlichen Beschreibungen.

[BibT_eX]

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013

PASSAT 2.0: A multi-functional SAT-based testing framework.

[BibT_eX]

[DOI]

Proceedings of the 14th Latin American Test Workshop, 2013

Data extraction from SystemC designs using debug symbols and the SystemC API.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013

Fault Ordering for Automatic Test Pattern Generation of Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the 43rd IEEE International Symposium on Multiple-Valued Logic, 2013

Exact Template Matching Using Boolean Satisfiability.

[BibT_eX]

[DOI]

Proceedings of the 43rd IEEE International Symposium on Multiple-Valued Logic, 2013

Improved SAT-based ATPG: more constraints, better compaction.

[BibT_eX]

[DOI]

Stephan Eggersglüß

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Text statt C++: Automatisierung des Systementwurfs mit Hilfe natürlicher Sprachverarbeitung.

[BibT_eX]

[DOI]

Proceedings of the 43. Jahrestagung der Gesellschaft für Informatik, 2013

Minimal Stimuli Generation in Simulation-Based Verification.

[BibT_eX]

[DOI]

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

Cone of Influence Analysis at the Electronic System Level Using Machine Learning.

[BibT_eX]

[DOI]

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

Towards a generic verification methodology for system models.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

Determining relevant model elements for the verification of UML/OCL specifications.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

Improving the mapping of reversible circuits to quantum circuits using multiple target lines.

[BibT_eX]

[DOI]

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

Exploiting reversibility in the complete simulation of reversible circuits.

[BibT_eX]

[DOI]

Simon Stelter

Proceedings of the AFRICON 2013, Pointe aux Piments, Mauritius, September 9-12, 2013, 2013

A compact and efficient SAT encoding for quantum circuits.

[BibT_eX]

[DOI]

Proceedings of the AFRICON 2013, Pointe aux Piments, Mauritius, September 9-12, 2013, 2013

2012

Equivalence Checking of Reversible Circuits.

[BibT_eX]

[DOI]

J. Multiple Valued Log. Soft Comput., 2012

RevKit: A Toolkit for Reversible Circuit Design.

[BibT_eX]

[DOI]

J. Multiple Valued Log. Soft Comput., 2012

Reducing Reversible Circuit Cost by Adding Lines.

[BibT_eX]

[DOI]

J. Multiple Valued Log. Soft Comput., 2012

Foreword: Special Issue on Reversible Computation.

[BibT_eX]

[DOI]

Irek Ulidowski

J. Multiple Valued Log. Soft Comput., 2012

Reversible Circuits: Recent Accomplishments and Future Challenges for an Emerging Technology - (Invited Paper).

[BibT_eX]

[DOI]

Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012

Assisted Behavior Driven Development Using Natural Language Processing.

[BibT_eX]

[DOI]

Proceedings of the Objects, Models, Components, Patterns - 50th International Conference, 2012

Using πDDs in the Design of Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation, 4th International Workshop, 2012

Property Checking of Quantum Circuits Using Quantum Multiple-Valued Decision Diagrams.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation, 4th International Workshop, 2012

Circuit Line Minimization in the HDL-Based Synthesis of Reversible Logic.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

Exact Synthesis of Toffoli Gate Circuits with Negative Control Lines.

[BibT_eX]

[DOI]

Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012

A Synthesis Flow for Sequential Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012

Optimizing the Mapping of Reversible Circuits to Four-Valued Quantum Gate Circuits.

[BibT_eX]

[DOI]

Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012

Synthesis of Reversible Circuits Using Decision Diagrams.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Electronic System Design, 2012

Generating formal system models from natural language descriptions.

[BibT_eX]

[DOI]

Ian G. Harris

Proceedings of the 2012 IEEE International High Level Design Validation and Test Workshop, 2012

Completeness-Driven Development.

[BibT_eX]

[DOI]

Proceedings of the Graph Transformations - 6th International Conference, 2012

Formal Specification Level.

[BibT_eX]

[DOI]

Proceedings of the Models, Methods, and Tools for Complex Chip Design, 2012

Formal Specification Level: Towards verification-driven design based on natural language processing.

[BibT_eX]

[DOI]

Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012

Coverage-Driven Stimuli Generation.

[BibT_eX]

[DOI]

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Debugging of inconsistent UML/OCL models.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Automatic design of low-power encoders using reversible circuit synthesis.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Eliminating invariants in UML/OCL models.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Realizing reversible circuits using a new class of quantum gates.

[BibT_eX]

[DOI]

Zahra Sasanian

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Synthesis of reversible circuits with minimal lines for large functions.

[BibT_eX]

[DOI]

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

Synthesis of quantum circuits for linear nearest neighbor architectures.

[BibT_eX]

[DOI]

Mehdi Saeedi

Quantum Inf. Process., 2011

Debugging reversible circuits.

[BibT_eX]

[DOI]

Integr., 2011

Design of Reversible and Quantum Circuits (Dagstuhl Seminar 11502).

[BibT_eX]

[DOI]

Kenichi Morita

Dagstuhl Reports, 2011

Encoding OCL Data Types for SAT-Based Verification of UML/OCL Models.

[BibT_eX]

[DOI]

Proceedings of the Tests and Proofs - 5th International Conference, 2011

RevKit: An Open Source Toolkit for the Design of Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - Third International Workshop, 2011

Towards automatic determination of problem bounds for object instantiation in static model verification.

[BibT_eX]

[DOI]

Proceedings of the 8th International Workshop on Model-Driven Engineering, 2011

Designing a RISC CPU in Reversible Logic.

[BibT_eX]

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2011

ATPG for Reversible Circuits Using Simulation, Boolean Satisfiability, and Pseudo Boolean Optimization.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

Elementary Quantum Gate Realizations for Multiple-Control Toffoli Gates.

[BibT_eX]

[DOI]

Zahra Sasanian

Proceedings of the 41st IEEE International Symposium on Multiple-Valued Logic, 2011

From Truth Tables to Programming Languages: Progress in the Design of Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the 41st IEEE International Symposium on Multiple-Valued Logic, 2011

Efficient realization of control logic in reversible circuits.

[BibT_eX]

[DOI]

Sebastian Offermann

Proceedings of the 2011 Forum on Specification & Design Languages, 2011

Improving ESOP-Based Synthesis of Reversible Logic Using Evolutionary Algorithms.

[BibT_eX]

[DOI]

Alexander Finder

Proceedings of the Applications of Evolutionary Computation, 2011

Determining the minimal number of lines for large reversible circuits.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

Verifying dynamic aspects of UML models.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

Improved Fault Diagnosis for Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE Asian Test Symposium, 2011

Determining minimal testsets for reversible circuits using Boolean satisfiability.

[BibT_eX]

[DOI]

Proceedings of the AFRICON 2011, 2011

2010

Synthese reversibler Logik (Synthesizing Reversible Logic).

[BibT_eX]

[DOI]

it Inf. Technol., 2010

BDD-Based Synthesis of Reversible Logic.

[BibT_eX]

[DOI]

Int. J. Appl. Metaheuristic Comput., 2010

SyReC: A Programming Language for Synthesis of Reversible Circuits.

[BibT_eX]

Sebastian Offermann

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2010

Verifying UML/OCL Models Using Boolean Satisfiability.

[BibT_eX]

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2010

Efficient Simulation-Based Debugging of Reversible Logic.

[BibT_eX]

[DOI]

Stefan Frehse

Proceedings of the 40th IEEE International Symposium on Multiple-Valued Logic, 2010

SAT-based ATPG for reversible circuits.

[BibT_eX]

[DOI]

Proceedings of the 5th International Design and Test Workshop, 2010

Hierarchical synthesis of reversible circuits using positive and negative Davio decomposition.

[BibT_eX]

[DOI]

Proceedings of the 5th International Design and Test Workshop, 2010

Enhancing debugging of multiple missing control errors in reversible logic.

[BibT_eX]

[DOI]

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

Graph Transformation Units Guided by a SAT Solver.

[BibT_eX]

[DOI]

Hans-Jörg Kreowski

Sabine Kuske

Proceedings of the Graph Transformations - 5th International Conference, 2010

Window optimization of reversible and quantum circuits.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

Synthesizing multiplier in reversible logic.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

Reducing the number of lines in reversible circuits.

[BibT_eX]

[DOI]

Proceedings of the 47th Design Automation Conference, 2010

Towards a Design Flow for Reversible Logic.

[BibT_eX]

[DOI]

Springer, ISBN: 978-90-481-9578-7, 2010

2009

Towards a design flow for reversible logic.

[BibT_eX]

[DOI]

PhD thesis, 2009

Exact Multiple-Control Toffoli Network Synthesis With SAT Techniques.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Exact Synthesis of Elementary Quantum Gate Circuits.

[BibT_eX]

[DOI]

J. Multiple Valued Log. Soft Comput., 2009

Effect of BDD Optimization on Synthesis of Reversible and Quantum Logic.

[BibT_eX]

[DOI]

Proceedings of the Workshop on Reversible Computation, 2009

Reversible Logic Synthesis with Output Permutation.

[BibT_eX]

[DOI]

Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

Evaluation of Cardinality Constraints on SMT-Based Debugging.

[BibT_eX]

[DOI]

Proceedings of the ISMVL 2009, 2009

Contradictory antecedent debugging in bounded model checking.

[BibT_eX]

[DOI]

Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

Ein Entwurfsablauf für Reversible Schaltkreise.

[BibT_eX]

[DOI]

Proceedings of the Ausgezeichnete Informatikdissertationen 2009, 2009

SMT-based stimuli generation in the SystemC Verification library.

[BibT_eX]

[DOI]

Proceedings of the Forum on specification and Design Languages, 2009

Synthesizing Reversible Circuits for Irreversible Functions.

[BibT_eX]

[DOI]

Gerhard W. Dueck

Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

Debugging of Toffoli networks.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2009

SWORD - Module-based SAT Solving.

[BibT_eX]

[DOI]

Proceedings of the Algorithms and Applications for Next Generation SAT Solvers, 08.11., 2009

BDD-based synthesis of reversible logic for large functions.

[BibT_eX]

[DOI]

Proceedings of the 46th Design Automation Conference, 2009

2008

Using Contradiction Analysis for Antecedent Debugging in Bounded Model Checking.

[BibT_eX]

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2008

Using Higher Levels of Abstraction for Solving Optimization Problems by Boolean Satisfiability.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

RevLib: An Online Resource for Reversible Functions and Reversible Circuits.

[BibT_eX]

[DOI]

Proceedings of the 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2008), 2008

Exact Synthesis of Elementary Quantum Gate Circuits for Reversible Functions with Don't Cares.

[BibT_eX]

[DOI]

Proceedings of the 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2008), 2008

Debugging Contradictory Constraints in Constraint-Based Random Simulation.

[BibT_eX]

[DOI]

Proceedings of the Languages for Embedded Systems and their Applications, 2008

Contradiction Analysis for Constraint-based Random Simulation.

[BibT_eX]

[DOI]

Proceedings of the Forum on specification and Design Languages, 2008

Identifying a Subset of System Verilog Assertions for Efficient Bounded Model Checking.

[BibT_eX]

[DOI]

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

Quantified Synthesis of Reversible Logic.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2008

2007

SWORD: A SAT like Prover Using Word Level Information.

[BibT_eX]

[DOI]

Proceedings of the VLSI-SoC: Advanced Topics on Systems on a Chip, 2007

Formal Verification on the Word Level using SAT-like Proof Techniques.

[BibT_eX]

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2007

Fast exact Toffoli network synthesis of reversible logic.

[BibT_eX]

[DOI]