Robert W. Dutton
Affiliations:- Stanford University, USA
According to our database1,
Robert W. Dutton
authored at least 79 papers
between 1981 and 2011.
Collaborative distances:
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Bibliography
2011
Self-Tuning for Maximized Lifetime Energy-Efficiency in the Presence of Circuit Aging.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Gate-controlled field-effect diodes and silicon-controlled rectifier for charged-device model ESD protection in advanced SOI technology.
Microelectron. Reliab., 2011
2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
ESD Design Strategies for High-Speed Digital and RF Circuits in Deeply Scaled Silicon Technologies.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
Proceedings of the Design, Automation and Test in Europe, 2010
2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
2008
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
Hybrid Integration of Bandgap Reference Circuits Using Silicon ICs and Germanium Devices.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
2007
A Built-in Technique for Measuring Substrate and Power-Supply Digital Switching Noise Using PMOS-Based Differential Sensors and a Waveform Sampler in System-on-Chip Applications.
IEEE Trans. Instrum. Meas., 2007
Microelectron. Reliab., 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
Microelectron. Reliab., 2006
Synthesized Compact Models and Experimental Verifications for Substrate Noise Coupling in Mixed-Signal ICs.
IEEE J. Solid State Circuits, 2006
2005
An analytical formulation of phase noise of signals with Gaussian-distributed jitter.
IEEE Trans. Circuits Syst. II Express Briefs, 2005
Synthesized compact model and experimental results for substrate noise coupling in lightly doped processes.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005
2004
Virtual-ground sensing techniques for a 49-ns/200-MHz access time 1.8-V 256-Mb 2-bit-per-cell flash memory.
IEEE J. Solid State Circuits, 2004
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004
Synthesized Compact Models (SCM) of Substrate Noise Coupling Analysis and Synthesis in Mixed-Signal ICs.
Proceedings of the 2004 Design, 2004
2003
A CAD-Oriented Modeling Approach of Frequency-Dependent Behavior of Substrate Noise Coupling for Mixed-Signal IC Design.
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003
Lumped, inductorless oscillators: how far can they go? [phase noise reduction limit].
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003
2002
IEEE J. Solid State Circuits, 2002
IEEE J. Solid State Circuits, 2002
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002
2001
A Software Framework for Creating Patient Specific Geometric Models from Medical Imaging Data for Simulation Based Medical Planning of Vascular Surgery.
Proceedings of the Medical Image Computing and Computer-Assisted Intervention, 2001
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001
A fast analytical technique for estimating the bounds of on-chip clock wire inductance.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001
2000
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000
On-chip inductance modeling and RLC extraction of VLSI interconnects for circuit simulation.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000
1999
Comprehensive Static Characterization of Vertical Electrostatically Actuated Polysilicon Beams.
IEEE Des. Test Comput., 1999
1998
Second Order Newton Iteration Method and Its Application to MOS Compact Modeling and Circuit Simulation.
VLSI Design, 1998
Observation of Anomalous Negative Differential Resistance in Diode Breakdown Simulation Using Carrier Temperature Dependent Impact Ionization.
VLSI Design, 1998
Modeling of Poly-Silicon Carrier Transport with Explicit Treatment of Grains and Grain Boundaries.
VLSI Design, 1998
Characterization of RF power BJT and improvement of thermal stability with nonlinear base ballasting.
IEEE J. Solid State Circuits, 1998
1996
Simulation of the hydrodynamic device model on distributed memory parallel computers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
1995
Formulation of Macroscopic Transport Models for Numerical Simulation of Semiconductor Devices.
VLSI Design, 1995
A Methodology for Parallelizing PDE Solvers: Application to Semiconductor Device Simulation.
Proceedings of the Seventh SIAM Conference on Parallel Processing for Scientific Computing, 1995
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995
1994
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
1993
Modeling of the charge balance condition on floating gates and simulation of EEPROMs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993
Technology CAD - computer simulation of IC processes and devices.
The Kluwer international series in engineering and computer science 243, Kluwer, ISBN: 978-0-7923-9379-5, 1993
1992
An approach to construct pre-conditioning matrices for block iteration of linear equations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992
1991
A STRIDE towards practical 3-D device simulation-numerical and visualization considerations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
Proceedings of the 28th Design Automation Conference, 1991
1990
A nonequilibrium one-dimensional quantum-mechanical simulation for AlGaAs/GaAs HEMT structures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990
1989
IEEE J. Solid State Circuits, February, 1989
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989
Improved physical modeling of submicron MOSFETs based on parameter extraction using 2-D simulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989
Future Gener. Comput. Syst., 1989
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989
1988
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988
1987
An Extension to Newton's Method in Device Simulators--On An Efficient Algorithm to Evaluate Small-Signal Parameters and to Predict Initial Guess.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987
Analysis of Velocity Saturation and Other Effects on Short-Channel MOS Transistor Capacitances.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987
1986
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986
1985
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985
Proceedings of the 22nd ACM/IEEE conference on Design automation, 1985
1983
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1983
1982
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1982
1981
Government interest and involvement in design automation development (Panel Discussion).
Proceedings of the 18th Design Automation Conference, 1981
Proceedings of the 18th Design Automation Conference, 1981