Robert Schilling

Martin Unterguggenberger

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Multi-Tag: A Hardware-Software Co-Design for Memory Safety based on Multi-Granular Memory Tagging.

[BibT_eX]

[DOI]

Martin Unterguggenberger

Proceedings of the 2023 ACM Asia Conference on Computer and Communications Security, 2023

2022

SFP: Providing System Call Flow Protection against Software and Fault Attacks.

[BibT_eX]

[DOI]

Martin Unterguggenberger

Proceedings of the 11th International Workshop on Hardware and Architectural Support for Security and Privacy, 2022

FIPAC: Thwarting Fault- and Software-Induced Control-Flow Attacks with ARM Pointer Authentication.

[BibT_eX]

[DOI]

Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2022

2021

SecWalk: Protecting Page Table Walks Against Fault Attacks.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2021

Protecting Indirect Branches Against Fault Attacks Using ARM Pointer Authentication.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2021

HECTOR-V: A Heterogeneous CPU Architecture for a Secure RISC-V Execution Environment.

[BibT_eX]

[DOI]

Proceedings of the ASIA CCS '21: ACM Asia Conference on Computer and Communications Security, 2021

CrypTag: Thwarting Physical and Logical Memory Vulnerabilities using Cryptographically Colored Memory.

[BibT_eX]

[DOI]

Proceedings of the ASIA CCS '21: ACM Asia Conference on Computer and Communications Security, 2021

2020

ConTExT: A Generic Approach for Mitigating Spectre.

[BibT_eX]

[DOI]

Proceedings of the 27th Annual Network and Distributed System Security Symposium, 2020

2019

ConTExT: Leakage-Free Transient Execution.

[BibT_eX]

[DOI]

CoRR, 2019

Small Faults Grow Up - Verification of Error Masking Robustness in Arithmetically Encoded Programs.

[BibT_eX]

[DOI]

Proceedings of the Verification, Model Checking, and Abstract Interpretation, 2019

Protecting RISC-V Processors against Physical Attacks.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

Securing conditional branches in the presence of fault attacks.

[BibT_eX]

[DOI]

Mario Werner

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

High speed ASIC implementations of leakage-resilient cryptography.

[BibT_eX]

[DOI]

Luca Benini

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Pointing in the Right Direction - Securing Memory Accesses in a Faulty World.

[BibT_eX]

[DOI]

Proceedings of the 34th Annual Computer Security Applications Conference, 2018

2017

An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics.

[BibT_eX]

[DOI]

Francesco Conti

Pasquale Davide Schiavone

Antonio Pullini

Davide Rossi

Frank Kagan Gürkaynak

IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Transparent Memory Encryption and Authentication.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2017

Leakage Bounds for Gaussian Side Channels.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2017

Multi-core data analytics SoC with a flexible 1.76 Gbit/s AES-XTS cryptographic accelerator in 65 nm CMOS.

[BibT_eX]

[DOI]

Frank K. Gürkaynak

Francesco Conti