Robert Payne

According to our database¹, Robert Payne authored at least 19 papers between 1962 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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In proceedings

Article

PhD thesis

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On csauthors.net:

Bibliography

2024

A Sub-THz CMOS Transceiver IC and System for Medium-Reach Guided Wave and Short-Reach Wireless Communication Links.

[BibT_eX]

[DOI]

Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

2015

An efficient and resilient ultra-high speed galvanic data isolator leveraging broad-band multi resonant tank electro-magnetic coupling.

[BibT_eX]

[DOI]

Proceedings of the Symposium on VLSI Circuits, 2015

2014

A 12 Bit 1.6 GS/s BiCMOS 2×2 Hierarchical Time-Interleaved Pipeline ADC.

[BibT_eX]

[DOI]

Matthew Gindlesperger

IEEE J. Solid State Circuits, 2014

2013

A 5-Gb/s Automatic Sub-Bit Between-Pair Skew Compensator for Parallel Data Communications in 0.13-µm CMOS.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2013

A 10GS/s 6b time-interleaved ADC with partially active flash sub-ADCs.

[BibT_eX]

[DOI]

Xiaochen Yang

Robert Payne

Jin Liu

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

Session 7 overview: Multi-Gb/s receiver and parallel I/O techniques: Wireline subcommittee.

[BibT_eX]

[DOI]

Robert Payne

Tatsuya Saito

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011

A 12b 1GS/s SiGe BiCMOS two-way time-interleaved pipeline ADC.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

Good, bad, ugly - 20 years of broadband evolution: What's next?

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010

A 16-Bit 100 to 160 MS/s SiGe BiCMOS Pipelined ADC With 100 dBFS SFDR.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2010

Energy-efficient high-speed interfaces.

[BibT_eX]

[DOI]

Naresh R. Shanbhag

Koichi Yamaguchi

Robert Payne

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

A 16b 100-to-160MS/s SiGe BiCMOS pipelined ADC with 100dBFS SFDR.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009

Will ADCs overtake binary frontends in backplane signaling?

[BibT_eX]

[DOI]

Ali Sheikholeslami

Robert Payne

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A 18mW 10Gbps continuous-time FIR equalizer for wired line data communications in 0.12µm CMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008

Future of High-Speed Transceivers (Forum).

[BibT_eX]

[DOI]

Robert Payne

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007

Multi-GB/s Transceivers.

[BibT_eX]

[DOI]

Robert Payne

Muneo Fukaishi

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2005

A 6.25-Gb/s binary transceiver in 0.13-μm CMOS for serial data transmission across high loss legacy backplane channels.

[BibT_eX]

[DOI]

Bharadwaj Parthasarathy

IEEE J. Solid State Circuits, 2005

1999

Panel: What is the Proper System on Chip Design Methodology.

[BibT_eX]

[DOI]

Proceedings of the 36th Conference on Design Automation, 1999

1997

Self-timed field programmmable gate array architectures.

[BibT_eX]

[DOI]

Robert Payne

PhD thesis, 1997

1962

Online digital computer measurement of a neurological control system.

[BibT_eX]

[DOI]

Lawrence Stark

Robert Payne

Yutaka Okabe

Commun. ACM, 1962

Robert Payne

Timeline

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