Robert M. Radway

According to our database, Robert M. Radway authored at least 12 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Omni 3D: BEOL-Compatible 3D Logic with Omnipresent Power, Signal, and Clock.

Suhyeong Choi, Carlo Gilardi, Paul Gutwin, Robert M. Radway, Tathagata Srimani, Subhasish Mitra

CoRR, 2024

Next-generation Probabilistic Computing Hardware with 3D MOSAICs, Illusion Scale-up, and Co-design.

Tathagata Srimani, Robert M. Radway, Masoud Mohseni, Kerem Yunus Çamsari, Subhasish Mitra

CoRR, 2024

MINOTAUR: An Edge Transformer Inference and Training Accelerator with 12 MBytes On-Chip Resistive RAM and Fine-Grained Spatiotemporal Power Gating.

Kartik Prabhu, Robert M. Radway, Y. Jeffrey, Kai Bartolone, Massimo Giordano, Fabian Peddinghaus, Yonatan Urman, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Subhasish Mitra, Priyanka Raina

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

8-bit Transformer Inference and Fine-tuning for Edge Accelerators.

Jeffrey Yu, Kartik Prabhu, Yonatan Urman, Robert M. Radway, Eric Han, Priyanka Raina

Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023

Foundry Monolithic 3D BEOL Transistor + Memory Stack: Iso-performance and Iso-footprint BEOL Carbon Nanotube FET+RRAM vs. FEOL Silicon FET+RRAM.

Tathagata Srimani, Andrew C. Yu, Robert M. Radway, Dennis Rich, Mark Nelson, Simon S. Wong, Denis Murphy, Samuel Fuller, Gage Hills, Subhasish Mitra, Max M. Shulaker

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Testbench on a Chip: A Yield Test Vehicle for Resistive Memory Devices.

Luke R. Upton, Guénolé Lallement, Michael D. Scott, Joyce Taylor, Robert M. Radway, Dennis Rich, Mark Nelson, Subhasish Mitra, Boris Murmann

Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

PBA: Percentile-Based Level Allocation for Multiple-Bits-Per-Cell RRAM.

Anjiang Wei, Akash Levy, Pu Yi, Robert M. Radway, Priyanka Raina, Subhasish Mitra, Sara Achour

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Ultra-Dense 3D Physical Design Unlocks New Architectural Design Points with Large Benefits.

Tathagata Srimani, Robert M. Radway, Jinwoo Kim, Kartik Prabhu, Dennis Rich, Carlo Gilardi, Priyanka Raina, Max M. Shulaker, Sung Kyu Lim, Subhasish Mitra

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Thermal Scaffolding for Ultra-Dense 3D Integrated Circuits.

Dennis Rich, Anna Kasperovich, Mohamadali Malakoutian, Robert M. Radway, Shiho Hagiwara, Takahide Yoshikawa, Srabanti Chowdhury, Subhasish Mitra

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

Three-Dimensional Stacked Neural Network Accelerator Architectures for AR/VR Applications.

Lita Yang, Robert M. Radway, Yu-Hsin Chen, Tony F. Wu, Huichu Liu, Elnaz Ansari, Vikas Chandra, Subhasish Mitra, Edith Beigné

IEEE Micro, 2022

CHIMERA: A 0.92-TOPS, 2.2-TOPS/W Edge AI Accelerator With 2-MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference.

Kartik Prabhu, Albert Gural, Zainab F. Khan, Robert M. Radway, Massimo Giordano, Kalhan Koul, Rohan Doshi, John W. Kustin, Timothy Liu, Gregorio B. Lopes, Victor Turbiner, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Guénolé Lallement, Boris Murmann, Subhasish Mitra, Priyanka Raina

IEEE J. Solid State Circuits, 2022

2019

A 43pJ/Cycle Non-Volatile Microcontroller with 4.7μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques.

Tony F. Wu, Binh Q. Le, Robert M. Radway, Andrew Bartolo, William Hwang, Seungbin Jeong, Haitong Li, Pulkit Tandon, Elisa Vianello, Pascal Vivet, Etienne Nowak, Mary Wootters, H.-S. Philip Wong, Mohamed M. Sabry Aly, Edith Beigné, Subhasish Mitra

Proceedings of the IEEE International Solid- State Circuits Conference, 2019