Robert Karam
Orcid: 0000-0002-2713-029X
According to our database1,
Robert Karam
authored at least 52 papers
between 2014 and 2024.
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Bibliography
2024
Enhancing the Reliability of Closed-Loop Medical Systems with Real-Time Biosignal Modeling.
J. Hardw. Syst. Secur., March, 2024
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
2023
Engaged Student Learning with Gamified Labs: A New Approach for Hardware Security Education.
Proceedings of the IEEE International Conference on Teaching, 2023
Proceedings of the Internet of Things. Advances in Information and Communication Technology, 2023
Proceedings of the Internet of Things. Advances in Information and Communication Technology, 2023
Bits to BNNs: Reconstructing FPGA ML-IP with Joint Bitstream and Side-Channel Analysis.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2023
2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
ACM J. Emerg. Technol. Comput. Syst., 2022
An EDA Framework for Design Space Exploration of On-Chip AI in Bioimplantable Applications.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022
Improving Student Learning in Hardware Security: Project Vision, Overview, and Experiences.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022
Trojan Resilience in Implantable and Wearable Medical Devices with Virtual Biosensing.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022
Protecting Deep Neural Network Intellectual Property with Architecture-Agnostic Input Obfuscation.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
Proceedings of the 44th Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2022
Efficient Nonlinear Autoregressive Neural Network Architecture for Real-Time Biomedical Applications.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
Behavioral Synthesis for Hardware Security, 2022
2021
IEEE Embed. Syst. Lett., 2021
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021
Proceedings of the Internet of Things. Technology and Applications, 2021
2020
Tunable FPGA Bitstream Obfuscation with Boolean Satisfiability Attack Countermeasure.
ACM Trans. Design Autom. Electr. Syst., 2020
Hidden in Plaintext: An Obfuscation-based Countermeasure against FPGA Bitstream Tampering Attacks.
ACM Trans. Design Autom. Electr. Syst., 2020
SN Comput. Sci., 2020
Dissecting Convolutional Neural Networks for Efficient Implementation on Constrained Platforms.
Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020
2019
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
Evaluating Edge Processing Requirements in Next Generation IoT Network Architectures.
Proceedings of the Internet of Things. A Confluence of Many Disciplines, 2019
2018
Proceedings of the 36th IEEE VLSI Test Symposium, 2018
Proceedings of the 3rd IEEE International Verification and Security Workshop, 2018
Design Tradeoffs in Bioimplantable Devices: A Case Study with Bladder Pressure Monitoring.
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018
Detecting RTL Trojans using Artificial Immune Systems and High Level Behavior Classification.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2018
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
IEEE Trans. Circuits Syst. II Express Briefs, 2017
Tunable and Lightweight On-Chip Event Detection for Implantable Bladder Pressure Monitoring Devices.
IEEE Trans. Biomed. Circuits Syst., 2017
Energy-Efficient Reconfigurable Hardware Accelerators for Data-Intensive Applications.
J. Low Power Electron., 2017
Memory-Centric Reconfigurable Accelerator for Classification and Machine Learning Applications.
ACM J. Emerg. Technol. Comput. Syst., 2017
IEEE Embed. Syst. Lett., 2017
Interleaved logic-in-memory architecture for energy-efficient fine-grained data processing.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
Mixed-granular architectural diversity for device security in the Internet of Things.
Proceedings of the 2017 Asian Hardware Oriented Security and Trust Symposium, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
IEEE Trans. Multi Scale Comput. Syst., 2016
An Embedded Memory-Centric Reconfigurable Hardware Accelerator for Security Applications.
IEEE Trans. Computers, 2016
Real-Time Classification of Bladder Events for Effective Diagnosis and Treatment of Urinary Incontinence.
IEEE Trans. Biomed. Eng., 2016
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
ENFIRE: An Energy-efficient Fine-grained Spatio-temporal Reconfigurable Computing Fabric (Abstact Only).
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016
Real-time, autonomous bladder event classification and closed-loop control from single-channel pressure data.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016
Ultralow-power data compression for implantable bladder pressure monitor: Algorithm and hardware implementation.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016
2015
MAHA: An Energy-Efficient Malleable Hardware Accelerator for Data-Intensive Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2015
Emerging Trends in Design and Applications of Memory-Based Computing and Content-Addressable Memories.
Proc. IEEE, 2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
2014
Trade-off between energy and quality of service through dynamic operand truncation and fusion.
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014