Robert H. Klenke

According to our database, Robert H. Klenke authored at least 36 papers between 1992 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

A multilevel cybersecurity and safety monitor for embedded cyber-physical systems: WIP abstract.

Smitha Gautham, Georgios Bakirtzis, Matthew T. Leccadito, Robert H. Klenke, Carl R. Elks

Proceedings of the 10th ACM/IEEE International Conference on Cyber-Physical Systems, 2019

2018

A Multilevel Cybersecurity and Safety Monitor for Embedded Cyber-Physical Systems.

Smitha Gautham, Georgios Bakirtzis, Matthew T. Leccadito, Robert H. Klenke, Carl R. Elks

CoRR, 2018

2013

RAMS: a fast, low-fidelity, multiple agent discrete-event simulator.

Tim Bakker, Garrett L. Ward, Siva T. Patibandla, Robert H. Klenke

Proceedings of the 2013 Summer Simulation Multiconference, 2013

Initial evaluation of an IEEE 802.11s-based mobile ad-hoc network for collaborative Unmanned Aerial Vehicles.

Siva Teja Patibandla, Tim Bakker, Robert H. Klenke

Proceedings of the International Conference on Connected Vehicles and Expo, 2013

2011

Introducing MicroBlaze as an infrastructure for performance modeling.

Fadi Obeidat, Robert H. Klenke

Proceedings of the 2011 IEEE International Conference on Microelectronic Systems Education, 2011

Microblaze: an application-independent fpga-based profiler (abstract only).

Fadi Obeidat, Robert H. Klenke

Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

2010

Application-Independent FPGA-based Profiling.

Fadi Obeidat, Robert H. Klenke

Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2010

Embedded Systems Performance Modeling using FPGA-based Profiling.

Fadi Obeidat, Jose Ortiz, Jeremy Cooper, Assem A. R. Bsoul, Robert H. Klenke

Proceedings of the 2010 International Conference on Embedded Systems & Applications, 2010

2007

Experiences Using the Xilinx Microblaze Softcore Processor and uCLinux in Computer Engineering Capstone Senior Design Projects.

Robert H. Klenke

Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

2005

A UAV-Based Computer Engineering Capstone Senior Design Project.

Robert H. Klenke

Proceedings of the 2005 International Conference on Microelectronics Systems Education, 2005

Design and fabrication of a digitally synthesized, digitally controlled ring oscillator.

Sam Mitchum, Robert H. Klenke

Proceedings of the Third IASTED International Conference on Circuits, 2005

2003

Teaching computer design using virtual prototyping.

Ronald D. Williams, Robert H. Klenke, James H. Aylor

IEEE Trans. Educ., 2003

A New Hardware/Software Codesign Environment and Senior Capstone Design Project for Computer Engineering.

Robert H. Klenke, Jerry H. Tucker, Jason M. Blevins

Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003

A Proposed Modeling Environment to Teach Performance Modeling and Hardware/Software Codesign to Senior Undergraduates.

Robert H. Klenke, James H. Aylor

Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003

Performance-Based System Design Education.

Jason J. Hein, James H. Aylor, Robert H. Klenke

Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003

2001

Performance Modeling of Hierarchical Crossbar-Based Multicomputer Systems.

Gang Han, Robert H. Klenke, James H. Aylor

IEEE Trans. Computers, 2001

Interfaces for mixed-level simulation with sequential elements.

Robert H. Klenke, James H. Aylor, Moshe Meyassed, William W. Dungan

J. Syst. Archit., 2001

Design of a 32-Bit Microprocessor in an Undergraduate VLSI Design Course.

Robert H. Klenke

Proceedings of the 2001 International Conference on Microelectronics Systems Education, 2001

A Hardware/Software Codesign Senior Capstone Design Project in Computer Engineering.

Robert H. Klenke

Proceedings of the 2001 International Conference on Microelectronics Systems Education, 2001

2000

Dynamic Access Ordering for Streamed Computations.

Sally A. McKee, William A. Wulf, James H. Aylor, Robert H. Klenke, Maximo H. Salinas, Sung I. Hong, Dee A. B. Weikle

IEEE Trans. Computers, 2000

System level testability analysis using Petri nets.

Tianjing Jiang, Robert H. Klenke, James H. Aylor, Gang Han

Proceedings of the IEEE International High-Level Design Validation and Test Workshop 2000, 2000

1999

Performance Modeling and Analysis in VHDL.

James H. Aylor, Robert H. Klenke

Proceedings of the VLSI Handbook., 1999

Resolving unknown inputs in mixed-level simulation with sequential elements.

Moshe Meyassed, Robert H. Klenke, James H. Aylor

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Access Order and Effective Bandwidth for Streams on a Direct Rambus Memory.

Sung I. Hong, Sally A. McKee, Maximo H. Salinas, Robert H. Klenke, James H. Aylor, William A. Wulf

Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999

1998

Smarter Memory: Improving Bandwidth for Streamed References.

Sally A. McKee, Robert H. Klenke, Kenneth L. Wright, William A. Wulf, Maximo H. Salinas, James H. Aylor, Alan P. Batson

Computer, 1998

A Top-Down Design Environment for Developing Pipelined Datapaths.

Robert M. McGraw, James H. Aylor, Robert H. Klenke

Proceedings of the 35th Conference on Design Automation, 1998

1997

An undergraduate advanced computer design course using virtual-prototyping.

Robert H. Klenke, James H. Aylor

Proceedings of the 1997 IEEE International Conference on Microelectronic Systems Education, 1997

An Integrated Design Environment for Performance and Dependability Analysis.

Robert H. Klenke, Moshe Meyassed, James H. Aylor, Barry W. Johnson, Ramesh Rao, Anup Ghosh

Proceedings of the 34st Conference on Design Automation, 1997

1996

An analysis of fault partitioned parallel test generation.

Joseph M. Wolf, Lori M. Kaufman, Robert H. Klenke, James H. Aylor, Ronald Waxman

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

An analysis of fault partitioning algorithms for fault partitioned ATPG.

Robert H. Klenke, James H. Aylor, Joseph M. Wolf

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Design and Evaluation of Dynamic Access Ordering Hardware.

Sally A. McKee, Assaji Aluwihare, Benjamin H. Clark, Robert H. Klenke, Trevor C. Landon, Christopher W. Oliver, Maximo H. Salinas, Adam E. Szymkowiak, Kenneth L. Wright, William A. Wulf, James H. Aylor

Proceedings of the 10th international conference on Supercomputing, 1996

1995

Refinement of system-level designs using hybrid modeling.

Robert M. McGraw, Moshe Meyassed, Robert H. Klenke, James H. Aylor, Ronald D. Williams

Proceedings of the 1st IEEE International Conference on Engineering of Complex Computer Systems (ICECCS '95), 1995

1994

Experimental Implementation of Dynamic Access Ordering.

Sally A. McKee, Robert H. Klenke, Andrew J. Schwab, William A. Wulf, Steven A. Moyer, James H. Aylor, Charles Y. Hitchcock

Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994

1993

Parallelization methods for circuit partitioning based parallel automatic test pattern generation.

Robert H. Klenke, Ronald D. Williams, James H. Aylor

Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993

Workstation Based Parallel Test Generation.

Robert H. Klenke, Lori M. Kaufman, James H. Aylor, Ronald Waxman, Padmini Narayan

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1992

Parallel-Processing Techniques for Automatic Test Pattern Generation.

Robert H. Klenke, Ronald D. Williams, James H. Aylor

Computer, 1992