Robert H. Dennard

According to our database, Robert H. Dennard authored at least 16 papers between 1964 and 2010.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2010

Practical Strategies for Power-Efficient Computing Technologies.

Leland Chang, David J. Frank, Robert K. Montoye, Steven J. Koester, Brian L. Ji, Paul W. Coteus, Robert H. Dennard, Wilfried Haensch

Proc. IEEE, 2010

2008

An 8T-SRAM for Variability Tolerance and Low-Voltage Operation in High-Performance Caches.

Leland Chang, Robert K. Montoye, Yutaka Nakamura, Kevin Batson, Richard J. Eickemeyer, Robert H. Dennard, Wilfried Haensch, Damir Jamsek

IEEE J. Solid State Circuits, 2008

2006

Silicon CMOS devices beyond scaling.

Wilfried Haensch, Edward J. Nowak, Robert H. Dennard, Paul M. Solomon, Andres Bryant, Omer H. Dokumaci, Arvind Kumar, Xinlin Wang, Jeffrey B. Johnson, Massimo V. Fischetti

IBM J. Res. Dev., 2006

2005

Gated-diode amplifiers.

Wing K. Luk, Robert H. Dennard

IEEE Trans. Circuits Syst. II Express Briefs, 2005

A novel dynamic memory cell with internal voltage gain.

Wing K. Luk, Robert H. Dennard

IEEE J. Solid State Circuits, 2005

2002

Challenges and future directions for the scaling of dynamic random-access memory (DRAM).

Jack A. Mandelman, Robert H. Dennard, Gary B. Bronner, John K. DeBrosse, Rama Divakaruni, Yujun Li, Carl J. Raden

IBM J. Res. Dev., 2002

2001

Device scaling limits of Si MOSFETs and their application dependencies.

David J. Frank, Robert H. Dennard, Edward J. Nowak, Paul M. Solomon, Yuan Taur, Hon-Sum Philip Wong

Proc. IEEE, 2001

2000

1-GHz fully pipelined 3.7-ns address access time 8 k×1024 embedded synchronous DRAM macro.

Osamu Takahashi, Sang H. Dhong, Manabu Ohkubo, Shohji Onishi, Robert H. Dennard, Robert Hannon, Scott Crowder, Subramanian S. Iyer, Matthew R. Wordeman, Bijan Davari, William B. Weinberger, Naoaki Aoki

IEEE J. Solid State Circuits, 2000

Design and characteristics of n-channel insulated-gate field-effect transistors.

Dale L. Critchlow, Robert H. Dennard, Stanley Schuster

IBM J. Res. Dev., 2000

1999

Design Of Ion-implanted MOSFET's with Very Small Physical Dimensions.

Robert H. Dennard, Fritz H. Gaensslen, Hwa-Nien Yu, V. Leo Rideout, Ernest Bassous, Andre R. Leblanc

Proc. IEEE, 1999

1996

I_DDQ Test: Sensitivity Analysis of Scaling.

Thomas W. Williams, Robert H. Dennard, Rohit Kapur, M. Ray Mercer, Wojciech Maly

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

Iddq Testing for High Performance CMOS - The Next Ten Years.

Thomas W. Williams, Rohit Kapur, M. Ray Mercer, Robert H. Dennard, Wojciech Maly

Proceedings of the 1996 European Design and Test Conference, 1996

1995

CMOS scaling for high performance and low power-the next ten years.

Bijan Davari, Robert H. Dennard, Ghavam G. Shahidi

Proc. IEEE, 1995

CMOS scaling in the 0.1-µm, 1.X-volt regime for high-performance applications.

Ghavam G. Shahidi, James D. Warnock, James Comfort, Stephen E. Fischer, Patricia A. McFarland, Alexandre Acovic, Terry I. Chappell, Barbara A. Chappell, Tak H. Ning, Carl J. Anderson, Robert H. Dennard, Jack Y.-C. Sun, Michael R. Polcari, Bijan Davari

IBM J. Res. Dev., 1995

Modeling and characterization of long on-chip interconnections for high-performance microprocessors.

Alina Deutsch, Gerard V. Kopcsay, Christopher W. Surovic, Barry J. Rubin, Lewis M. Terman, Richard P. Dunne Jr., Thomas A. Gallo, Robert H. Dennard

IBM J. Res. Dev., 1995

1964

A Vestigial-Sideband, Phase-Reversal Data Transmission System.

Dale L. Critchlow, Robert H. Dennard, Emil Hopner

IBM J. Res. Dev., 1964