Robert E. Huston

According to our database1, Robert E. Huston authored at least 4 papers between 1983 and 1998.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1998
A scalable architecture for VLSI test.
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

1997
Pin Margin Analysis.
Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

1992
A bipolar population counter using wave pipelining to achieve 2.5* normal clock frequency.
IEEE J. Solid State Circuits, May, 1992

1983
An Analysis of ATE Testing Costs.
Proceedings of the Proceedings International Test Conference 1983, 1983


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