Robert B. Mueller-Thuns

Robert K. Brayton

Proceedings of the Computer Aided Verification, 6th International Conference, 1994

1993

Benchmarking Parallel Processing Platforms: An Applications Perspective.

[BibT_eX]

[DOI]

Robert F. Damiano

IEEE Trans. Parallel Distributed Syst., 1993

VLSI logic and fault simulation on general-purpose parallel computers.

[BibT_eX]

[DOI]

Robert F. Damiano

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Concurrent Hierarchical and Multilevel Simulation of VLSI Circuits.

[BibT_eX]

[DOI]

Simul., 1993

1991

Parallel switch-level simulation for VLSI.

[BibT_eX]

[DOI]

Proceedings of the conference on European design automation, 1991

1990

Parallel processing for VLSI simulation

[BibT_eX]

[DOI]

PhD thesis, 1990

Hierarchical multi-level fault simulation of large systems.

[BibT_eX]

[DOI]

J. Electron. Test., 1990

Design of a scalable parallel switch-level simulator for VLSI.

[BibT_eX]

[DOI]

Proceedings of the Proceedings Supercomputing '90, New York, NY, USA, November 12-16, 1990, 1990

Fault grading of large digital systems.

[BibT_eX]

[DOI]

Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

SNEL: A Switch-Level Simulator Using Multiple Levels of Functional Abstraction.

[BibT_eX]

[DOI]

Prithviraj Banerjee

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1989

Algorithm-Based Fault Tolerance for Adaptive Least Squares Lattice Filtering on a Hypercube Multiprocessor.

[BibT_eX]

David McFarland

Prithviraj Banerjee

Proceedings of the International Conference on Parallel Processing, 1989

Portable parallel logic and fault simulation.

[BibT_eX]

[DOI]

Robert F. Damiano

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

Automatic Generation of Behavioral Models from Switch-Level Descriptions.

[BibT_eX]

[DOI]

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1988

CHAMP: concurrent hierarchical and multilevel program for simulation of VLSI circuits.

[BibT_eX]

[DOI]