Rizwan Tariq Syed
Orcid: 0000-0001-9232-734X
According to our database1,
Rizwan Tariq Syed
authored at least 8 papers
between 2019 and 2024.
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Bibliography
2024
FPGA Implementation of a Fault-Tolerant Fused and Branched CNN Accelerator With Reconfigurable Capabilities.
IEEE Access, 2024
Aging and Soft Error Resilience in Reconfigurable CNN Accelerators Employing a Multi-Purpose On-Chip Sensor.
Proceedings of the 25th IEEE Latin American Test Symposium, 2024
2023
IEEE Trans. Circuits Syst. II Express Briefs, March, 2023
Artificial Neural Network Accelerator for Classification of In-Field Conducted Noise in Integrated Circuits' DC Power Lines.
Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
2022
FPGA-Based Acceleration of Convolutional Neural Network for Gesture Recognition Using mm-Wave FMCW Radar.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2022, Oslo, 2022
2020
Fault Tolerant Platform for Communication and Distance Measurement in Highly Automated Driving.
Proceedings of the 9th Mediterranean Conference on Embedded Computing, 2020
2019
Developing a Configurable Fault Tolerant Multicore System for Optimized Sensor Processing.
Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019