Rimas Avizienis

According to our database, Rimas Avizienis authored at least 19 papers between 2000 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

The STAR-Guardian Network for the Protection of Long-Life Cyber-Physical Systems.

Algirdas V. Avizienis, Rimas Avizienis, Audrius V. Avizienis

Proceedings of the 49th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2019

2017

Microprocessor chip with photonic I/O.

Chen Sun, Mark T. Wade, Yunsup Lee, Jason S. Orcutt, Luca Alloatti, Michael S. Georgas, Andrew S. Waterman, Jeffrey M. Shainline, Rimas R. Avizienis, Sen Lin, Benjamin R. Moss, Rajesh Kumar, Fabio Pavanello, Amir H. Atabaki, Henry M. Cook, Albert J. Ou, Jonathan C. Leu, Yu-Hsin Chen, Krste Asanovic, Rajeev J. Ram, Milos A. Popovic, Vladimir Marko Stojanovic

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2017

2016

An Agile Approach to Building RISC-V Microprocessors.

Yunsup Lee, Andrew Waterman, Henry Cook, Brian Zimmer, Ben Keller, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Rimas Avizienis, Brian C. Richards, Jonathan Bachrach, David A. Patterson, Elad Alon, Bora Nikolic, Krste Asanovic

IEEE Micro, 2016

A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI.

Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Steven Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic

IEEE J. Solid State Circuits, 2016

The Concept of a Software-Free Resilience Infrastructure for Cyber-Physical Systems.

Algirdas Avizienis, Rimas Avizienis, Audrius V. Avizienis

Proceedings of the 46th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2016

2015

Single-chip microprocessor that communicates directly using light.

Chen Sun, Mark T. Wade, Yunsup Lee, Jason S. Orcutt, Luca Alloatti, Michael Georgas, Andrew Waterman, Jeffrey M. Shainline, Rimas Avizienis, Sen Lin, Benjamin Moss, Rajesh Kumar, Fabio Pavanello, Amir H. Atabaki, Henry Cook, Albert J. Ou, Jonathan C. Leu, Yu-Hsin Chen, Krste Asanovic, Rajeev J. Ram, Milos A. Popovic, Vladimir Marko Stojanovic

Nat., 2015

A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI.

Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic

Proceedings of the Symposium on VLSI Circuits, 2015

Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking.

Yunsup Lee, Brian Zimmer, Andrew Waterman, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Henry Cook, Rimas Avizienis, Brian C. Richards, Elad Alon, Borivoje Nikolic, Krste Asanovic

Proceedings of the 2015 IEEE Hot Chips 27 Symposium (HCS), 2015

2014

A 45nm 1.3GHz 16.7 double-precision GFLOPS/W RISC-V processor with vector accelerators.

Yunsup Lee, Andrew Waterman, Rimas Avizienis, Henry Cook, Chen Sun, Vladimir Stojanovic, Krste Asanovic

Proceedings of the ESSCIRC 2014, 2014

2013

Exploring the Tradeoffs between Programmability and Efficiency in Data-Parallel Accelerators.

Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic

ACM Trans. Comput. Syst., 2013

The RISC-V instruction set.

Andrew Waterman, Yunsup Lee, Rimas Avizienis, Henry Cook, David A. Patterson, Krste Asanovic

Proceedings of the 2013 IEEE Hot Chips 25 Symposium (HCS), 2013

2012

Chisel: constructing hardware in a Scala embedded language.

Jonathan Bachrach, Huy Vo, Brian C. Richards, Yunsup Lee, Andrew Waterman, Rimas Avizienis, John Wawrzynek, Krste Asanovic

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

Real-time Musical Applications on an Experimental Operating System for Multi-Core Processors.

Juan A. Colmenares, Ian Saxton, Eric Battenberg, Rimas Avizienis, Nils Peters, Krste Asanovic, John Kubiatowicz, David Wessel

Proceedings of the 2011 International Computer Music Conference, 2011

The Maven vector-thread architecture.

Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic

Proceedings of the 2011 IEEE Hot Chips 23 Symposium (HCS), 2011

2010

RAMP gold: an FPGA-based architecture simulator for multiprocessors.

Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yunsup Lee, Henry Cook, David A. Patterson, Krste Asanovic

Proceedings of the 47th Design Automation Conference, 2010

2007

A Force Sensitive Multi-Touch Array Supporting Multiple 2-D Musical Control Structures.

David Wessel, Rimas Avizienis, Adrian Freed, Matthew Wright

Proceedings of the Seventh International Conference on New Interfaces for Musical Expression, 2007

2006

Beyond 0-5V: Expanding Sensor Integration Architectures.

Adrian Freed, Rimas Avizienis, Matthew Wright

Proceedings of the New Interfaces for Musical Expression, 2006

2000

A New Music Keyboard with Continuous Key-position Sensing and High-speed Communication.

Adrian Freed, Rimas Avizienis

Proceedings of the 2000 International Computer Music Conference, 2000

Scalable Connectivity Processor for Computer Music Performance Systems.

Rimas Avizienis, Adrian Freed, Takahiko Suzuki, David Wessel

Proceedings of the 2000 International Computer Music Conference, 2000