Rico Jossel M. Maestro
According to our database1,
Rico Jossel M. Maestro
authored at least 12 papers
between 2013 and 2019.
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Bibliography
2019
A 0.5 V Low-Power All-Digital Phase-Locked Loop in 65 nm Complementary Metal-Oxide-Semiconductor Process.
J. Low Power Electron., 2019
2018
A Study on the Effectiveness of Using a Hybrid Topology in Improving the Power Efficiency and Voltage Regulation over a Wide Input Range of DC-DC Converters.
Proceedings of the TENCON 2018, 2018
A gm/ID Based Algorithm for the Design of CMOS Miller Operational Amplifiers in 65 nm Technology.
Proceedings of the TENCON 2018, 2018
A 0.5V Low-Power All-Digital Phase-Locked Loop in 65nm CMOS Process for Wireless Sensing Applications.
Proceedings of the TENCON 2018, 2018
An Ultra-Low Power Direct Active-RF Detection Wake-Up Receiver with Noise-Cancelling Envelope Detector in 65 nm CMOS Process.
Proceedings of the TENCON 2018, 2018
A 2.4 GHz Energy-efficient Short-range Receiver with Wake-up and Multiple Gain Settings for Wireless Sensor Networks.
Proceedings of the TENCON 2018, 2018
Low Power Converter for Capacitive Sensors Using Capacitance-to-Pulse Width Modulation.
Proceedings of the TENCON 2018, 2018
Design and Implementation of a Thermoelectric Energy Harvesting Interface Circuit with Maximum Power Point Tracking and Self-Startup Capability for Wireless Sensor Nodes.
Proceedings of the TENCON 2018, 2018
A Study on Coarse Stage Bit Allocation to Improve Power Efficiency of a 10-bit Coarse-Fine SAR ADC Implemented in 65nm CMOS Process for Environmental Sensing Applications.
Proceedings of the TENCON 2018, 2018
Proceedings of the 2018 New Generation of CAS, 2018
2017
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
2013
Improving an undergraduate laboratory course for semiconductor device theory to enhance an IC design program.
Proceedings of the 2013 IEEE International Conference on Microelectronic Systems Education, 2013