Richard Uhlig

According to our database1, Richard Uhlig authored at least 12 papers between 1991 and 2005.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2005
Intel Virtualization Technology.
Computer, 2005

2000
Thread Level Parallelism and Interactive Performance of Desktop Applications.
Proceedings of the ASPLOS-IX Proceedings of the 9th International Conference on Architectural Support for Programming Languages and Operating Systems, 2000

1997
Trap-Driven Memory Simulation with Tapeworm II.
ACM Trans. Model. Comput. Simul., 1997

Trace-Driven Memory Simulation: A Survey.
ACM Comput. Surv., 1997

Trading Conflict and Capacity Aliasing in Conditional Branch Predictors.
Proceedings of the 24th International Symposium on Computer Architecture, 1997

1995
Trap-driven memory simulation.
PhD thesis, 1995

Instruction Fetching: Coping with Code Bloat.
Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995

1994
Design Tradeoffs for Software-Managed TLBs.
ACM Trans. Comput. Syst., 1994

Kernel-Based Memory Simulation.
Proceedings of the 1994 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1994

Optimal Allocation of On-Chip Memory for Multiple-API Operating Systems.
Proceedings of the 21st Annual International Symposium on Computer Architecture. Chicago, 1994

Trap-driven Simulation with Tapeworm II.
Proceedings of the ASPLOS-VI Proceedings, 1994

1991
Using <i>Lookahead</i> to reduce memory bank contention for decoupled operand references.
Proceedings of the Proceedings Supercomputing '91, 1991


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