Richard R. Shively

According to our database1, Richard R. Shively authored at least 12 papers between 1965 and 2000.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2000
An efficient bit-loading algorithm for DMT applications.
IEEE Commun. Lett., 2000

Generalizing SPIHT: a family of efficient image compression algorithms.
Proceedings of the IEEE International Conference on Acoustics, 2000

1992
Application and packaging of the AT&T DSP3 parallel signal processor.
Proceedings of the Application Specific Array Processors, 1992

1989
A high performance reconfigurable parallel processing architecture.
Proceedings of the Proceedings Supercomputing '89, Reno, NV, USA, November 12-17, 1989, 1989

A reconfigurable fault-tolerant systolic signal processor.
Proceedings of the IEEE International Conference on Acoustics, 1989

1987
The ASPEN parallel computer, speech recognition and parallel dynamic programming.
Proceedings of the IEEE International Conference on Acoustics, 1987

1984
Cascading Transmission Gates to Enhance Multiplier Performance.
IEEE Trans. Computers, 1984

1982
Architecture of a Programmable Digital Signal Processor.
IEEE Trans. Computers, 1982

1975
A novel implementation of digital phase shifters.
Bell Syst. Tech. J., 1975

1969
Arithmetic Unit of a Computing Element in a Global, Highly Parallel Computer.
IEEE Trans. Computers, 1969

1968
A Digital Processor to Generate Spectra in Real Time.
IEEE Trans. Computers, 1968

1965
A silicon monolithic memory utilizing a new storage element.
Proceedings of the 1965 fall joint computer conference, part I, 1965


  Loading...