Richard Lin

Orcid: 0000-0003-3960-6248

According to our database1, Richard Lin authored at least 23 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Mechanisms and Computational Design of Multi-Modal End-Effector with Force Sensing using Gated Networks.
CoRR, 2024

Design Space Exploration for Board-level Circuits: Exploring Alternatives in Component-based Design.
Proceedings of the CHI Conference on Human Factors in Computing Systems, 2024

A Cross-domain, Computational Robot Design Flow from Morphology to Fabrication.
Proceedings of the 20th IEEE International Conference on Automation Science and Engineering, 2024

2023
Verification of Chisel Hardware Designs with ChiselVerify.
Microprocess. Microsystems, February, 2023

2022
Hierarchical Computational Design of Board-Level Electronics.
Proceedings of the SCF '22: Proceedings of the 7th Annual ACM Symposium on Computational Fabrication, 2022

Computational Support for Multiplicity in Hierarchical Electronics Design.
Proceedings of the SCF '22: Proceedings of the 7th Annual ACM Symposium on Computational Fabrication, 2022

2021
Human-Centered Circuit Board Design With Flexible Levels of Abstraction and Ambiguity
PhD thesis, 2021

Open-Source Verification with Chisel and Scala.
CoRR, 2021

Weaving Schematics and Code: Interactive Visual Editing for Hardware Description Languages.
Proceedings of the UIST '21: The 34th Annual ACM Symposium on User Interface Software and Technology, 2021

ChiselVerify: An Open-Source Hardware Verification Library for Chisel and Scala.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021

2020
Opportunities and Challenges for Circuit Board Level Hardware Description Languages.
CoRR, 2020

Polymorphic Blocks: Unifying High-level Specification and Low-level Control for Circuit Board Design.
Proceedings of the UIST '20: The 33rd Annual ACM Symposium on User Interface Software and Technology, 2020

Supporting Circuit Design with a Block-Based, Generator Language.
Proceedings of the Extended Abstracts of the 2020 CHI Conference on Human Factors in Computing Systems, 2020

2019
A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance.
IEEE J. Solid State Circuits, 2019

Beyond Schematic Capture: Meaningful Abstractions for Better Electronics Design Tools.
Proceedings of the 2019 CHI Conference on Human Factors in Computing Systems, 2019

2018

Guardians of Practice: A Contextual Inquiry of Failure-Mitigation Strategies within Creative Practices.
Proceedings of the 2018 on Designing Interactive Systems Conference 2018, 2018

2017
Turning <i>coders</i> into <i>makers</i>: the promise of embedded design generation.
Proceedings of the 1st Annual ACM Symposium on Computational Fabrication, 2017

Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Cyclist: Accelerating hardware development.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

2016
JITPCB.
Proceedings of the 2016 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2016

2010
An in-situ temperature-sensing interface based on a SAR ADC in 45nm LP digital CMOS for the frequency-temperature compensation of crystal oscillators.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2008
A 1×2 MIMO Multi-Band CMOS Transceiver with an Integrated Front-End in 90nm CMOS for 802.11a/g/n WLAN Applications.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008


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