Richard B. Brown
According to our database1,
Richard B. Brown
authored at least 77 papers
between 1989 and 2019.
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Online presence:
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Bibliography
2019
Portable Bluetooth Microsystem for Electrochemically Modulated Nitric Oxide-Releasing Catheters.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019
2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
2010
Dynamically Pulsed MTCMOS With Bus Encoding for Reduction of Total Power and Crosstalk Noise.
IEEE Trans. Very Large Scale Integr. Syst., 2010
Analog Circuit Design Methodologies to Improve Negative-Bias Temperature Instability Degradation.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010
2009
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
A centralized supply voltage and local body bias-based compensation approach to mitigate within-die process variation.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
A Precise Negative Bias Temperature Instability Sensor using Slew-rate Monitor Circuitry.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
Microelectron. J., 2008
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008
A 0.5-to-480MHz Self-Referenced CMOS Clock Generator with 90ppm Total Frequency Error and Spread-Spectrum Capability.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
On-Chip Process Variation Detection and Compensation Using Delay and Slew-Rate Monitoring Circuits.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
A 25MHz all-CMOS reference clock generator for XO-replacement in serial wire interfaces.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
IEEE J. Solid State Circuits, 2007
2006
Gate-Induced Barrier Field Effect Transistor (GBFET) - A New Thin Film Transistor for Active Matrix Liquid Crystal Display Systems.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
A dual-V<sub>DD</sub> boosted pulsed bus technique for low power and low leakage operation.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Low-latency, HDL-synthesizable dynamic clock frequency controller with self-referenced hybrid clocking.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
2005
Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor.
IEEE Trans. Computers, 2005
IEEE J. Solid State Circuits, 2005
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Dynamically Pulsed MTCMOS with Bus Encoding for Total Power and Crosstalk Minimization.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Proceedings of the 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 2005
2004
IEEE J. Solid State Circuits, 2004
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
A low-voltage, chemical sensor interface for systems-on-chip: the fully-differential potentiostat.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Design, Implementation, and Verification of a CMOS-Integrated Chemical Sensor System.
Proceedings of the 2004 International Conference on MEMS, 2004
2003
Ultra Low-Leakage Power Strategies for Sub-1 V VLSI: Novel Circuit Styles and Design Methodologies for Partially Depleted Silicon-On-Insulator (PD-SOI) CMOS Technology.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003
Microsystem and SoC Design with UMIPS.
Proceedings of the IFIP VLSI-SoC 2003, 2003
Evaluation of Dynamic-Threshold Logic for Low-Power VLSI Design in 0.13um PD-SOI.
Proceedings of the IFIP VLSI-SoC 2003, 2003
Novel Circuit Styles for Minimization of Floating Body Effects in Scaled PD-SOI CMOS.
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
New optimal design strategies and analysis of ultra-low leakage circuits for nano-scale SOI technology.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
A Heuristic to Determine Low Leakage Sleep State Vectors for CMOS Combinational Circuits.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Circuit techniques for gate and sub-threshold leakage minimization in future CMOS technologies.
Proceedings of the ESSCIRC 2003, 2003
New digital circuit techniques for total standby leakage reduction in nano-scale SOI technology.
Proceedings of the ESSCIRC 2003, 2003
Proceedings of the 2003 Design, 2003
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003
Increasing the number of effective registers in a low-power processor using a windowed register file.
Proceedings of the International Conference on Compilers, 2003
2001
Proceedings of the 19th Conference on Advanced Research in VLSI (ARVLSI 2001), 2001
2000
IEEE Trans. Educ., 2000
1999
Proceedings of the 1999 International Symposium on Physical Design, 1999
Proceedings of the 18th Conference on Advanced Research in VLSI (ARVLSI '99), 1999
1998
IEEE Trans. Very Large Scale Integr. Syst., 1998
ACM Trans. Design Autom. Electr. Syst., 1998
Proceedings of the 35th Conference on Design Automation, 1998
1997
1996
Ravel-XL: a hardware accelerator for assigned-delay compiled-code logic gate simulation.
IEEE Trans. Very Large Scale Integr. Syst., 1996
1995
IEEE J. Solid State Circuits, October, 1995
Proceedings of the 32st Conference on Design Automation, 1995
1994
IEEE J. Solid State Circuits, October, 1994
Proceedings of the ASPLOS-VI Proceedings, 1994
1993
IEEE J. Solid State Circuits, October, 1993
Proceedings of the 26th Annual International Symposium on Microarchitecture, 1993
1992
Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992
1991
Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, 1991
Proceedings of the First Great Lakes Symposium on VLSI, 1991
1989
A comparison of gold and superconductors used as air-bridge and microstrip interconnects for high-speed VLSI.
IEEE J. Solid State Circuits, June, 1989