Riccardo Zurla

Orcid: 0000-0002-4315-1269

According to our database1, Riccardo Zurla authored at least 13 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Designing Circuits for AiMC Based on Non-Volatile Memories: A Tutorial Brief on Trade-Off and Strategies for ADCs and DACs Co-Design.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

Impact of Input Encoding and ADC Resolution on Matrix-Vector Multiplication Accuracy.
Proceedings of the 19th Conference on Ph.D Research in Microelectronics and Electronics, 2024

A Bit-Line Biasing Circuit for Analog In-Memory Computing Based on Phase Change Memory.
Proceedings of the 19th Conference on Ph.D Research in Microelectronics and Electronics, 2024

2022
An Extended Temperature Range ePCM Memory in 90-nm BCD for Smart Power Applications.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2020
Enhanced Compensation for Voltage Regulators Based on Three-Stage CMOS Operational Amplifiers for Large Capacitive Loads.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Current Tracking Technique Enabling 1-Bit/Cell Storage in Ge-Rich Phase Change Memory.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

Current DAC Based -40dB PSRR Configurable Output LDO in BCD Technology.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

Enhanced Multiple-Output Programmable Current Pulse Generator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2-Mb Embedded Phase Change Memory With 16-ns Read Access Time and 5-Mb/s Write Throughput in 90-nm BCD Technology for Automotive Applications.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2018
A 32-KB ePCM for Real-Time Data Processing in Automotive and Smart Power Applications.
IEEE J. Solid State Circuits, 2018

2017
A 32KB 18ns random access time embedded PCM with enhanced program throughput for automotive and smart power applications.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2016
Bandwidth optimization of CMOS two-stage operational amplifiers under power consumption and area constraints.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Enhanced voltage buffer compensation technique for two-stage CMOS operational amplifiers.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016


  Loading...