Riccardo Tonietto

According to our database1, Riccardo Tonietto authored at least 5 papers between 2005 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2009
A 3 GHz Fractional All-Digital PLL With a 1.8 MHz Bandwidth Implementing Spur Reduction Techniques.
IEEE J. Solid State Circuits, 2009

Insights into wideband fractional All-Digital PLLs for RF applications.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2006
Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell.
IEEE J. Solid State Circuits, 2006

A 5.4mW GPS CMOS Quadrature Front-End Based on a Single-Stage LNA-Mixer-VCO.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005
A 72-mW CMOS 802.11a direct conversion front-end with 3.5-dB NF and 200-kHz 1/f noise corner.
IEEE J. Solid State Circuits, 2005


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