Riccardo Scarsi

According to our database¹, Riccardo Scarsi authored at least 18 papers between 1997 and 2003.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

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2003

Scheduling battery usage in mobile systems.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2003

2001

Stream synthesis for efficient power simulation based on spectral transforms.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2001

Discrete-time battery models for system-level low-power design.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2001

Battery-Driven Dynamic Power Management.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2001

Extending lifetime of portable systems by battery scheduling.

[BibT_eX]

[DOI]

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

2000

Glitch power minimization by selective gate freezing.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2000

Architectures and synthesis algorithms for power-efficient businterfaces.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

A multilevel engine for fast power simulation of realistic inputstreams.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

Battery-Driven Dynamic Power Management of Portable Systems.

[BibT_eX]

[DOI]

Proceedings of the 13th International Symposium on System Synthesis, 2000

A spatially-adaptive bus interface for low-switching communication (poster session).

[BibT_eX]

[DOI]

Andrea Acquaviva

Riccardo Scarsi

Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

A Discrete-Time Battery Model for High-Level Power Estimation.

[BibT_eX]

[DOI]

Proceedings of the 2000 Design, 2000

1999

Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 1999

Regression-Based Macromodeling for Delay Estimation of Behavioral Components.

[BibT_eX]

[DOI]

Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

Glitch Power Minimization by Gate Freezing.

[BibT_eX]

[DOI]

Proceedings of the 1999 Design, 1999

Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses.

[BibT_eX]

[DOI]

Proceedings of the 36th Conference on Design Automation, 1999

1998

Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits.

[BibT_eX]

[DOI]

Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

1997

Fast power estimation for deterministic input streams.

[BibT_eX]

[DOI]

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks.

[BibT_eX]

[DOI]

Proceedings of the European Design and Test Conference, 1997

Riccardo Scarsi

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