Ricardo S. Ferreira
Orcid: 0000-0003-1802-7829Affiliations:
- Federal University of Viçosa, Minas Gerais, Brazil
According to our database1,
Ricardo S. Ferreira
authored at least 74 papers
between 2004 and 2024.
Collaborative distances:
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Bibliography
2024
Examples and tutorials on using Google Colab and Gradio to create online interactive student-learning modules.
Comput. Appl. Eng. Educ., July, 2024
SN Comput. Sci., 2024
AIoT tool integration for enriching teaching resources and monitoring student engagement.
Internet Things, 2024
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024
Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024
2023
High-performance graphics processing unit-based strategy for tuning a unmanned aerial vehicle controller subject to time-delay constraints.
Concurr. Comput. Pract. Exp., 2023
Concurr. Comput. Pract. Exp., 2023
Fast flow cloud: A stream dataflow framework for cloud FPGA accelerator overlays at runtime.
Concurr. Comput. Pract. Exp., 2023
Proceedings of the XIII Brazilian Symposium on Computing Systems Engineering, 2023
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023
A Non-Blocking Multistage Interconnection using Regular Clock Schemes for QCA Circuits.
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023
2022
IEEE Des. Test, 2022
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022
Proceedings of the CC '22: 31st ACM SIGPLAN International Conference on Compiler Construction, Seoul, South Korea, April 2, 2022
2021
ACM Trans. Embed. Comput. Syst., 2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Proceedings of the XI Brazilian Symposium on Computing Systems Engineering, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Is It Time to Include High-Level Synthesis Design in Digital System Education for Undergraduate Computer Engineers?
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Personalizing Online Computer Engineering Resources and Labs for Digital, Embedded, and Computer System Courses.
Proceedings of the IEEE Frontiers in Education Conference, 2021
Proceedings of the International Conference on Computational Science and Computational Intelligence, 2021
2020
On the impact of the synchronization constraint and interconnections in quantum-dot cellular automata.
Microprocess. Microsystems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the International Conference on Field-Programmable Technology, 2020
GA-lapagos, an open-source c framework including a python-based system for data analysis.
Proceedings of the GECCO '20: Genetic and Evolutionary Computation Conference, 2020
2019
A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design.
Trans. High Perform. Embed. Archit. Compil., 2019
READY: A Fine-Grained Multithreading Overlay Framework for Modern CPU-FPGA Dataflow Applications.
ACM Trans. Embed. Comput. Syst., 2019
ADD: Accelerator Design and Deploy - A tool for FPGA high-performance dataflow computing.
Concurr. Comput. Pract. Exp., 2019
Proceedings of the SIGGRAPH Asia 2019 Technical Briefs, 2019
Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019
2018
Proceedings of the Symposium on High Performance Computing Systems, 2018
Proceedings of the VIII Brazilian Symposium on Computing Systems Engineering, 2018
Proceedings of the 30th International Symposium on Computer Architecture and High Performance Computing, 2018
Simplifying HW/SW integration to deploy multiple accelerators for CPU-FPGA heterogeneous platforms.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018
Lessons learned on which applications benefit when implemented on CPU-FPGA heterogeneous system.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the 26th ACM SIGSPATIAL International Conference on Advances in Geographic Information Systems, 2018
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
2017
Exploring the dynamics of large-scale gene regulatory networks using hardware acceleration on a heterogeneous CPU-FPGA platform.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017
2016
A Dynamic Modulo Scheduling with Binary Translation: Loop optimization with software compatibility.
J. Signal Process. Syst., 2016
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016
2015
ACM Trans. Reconfigurable Technol. Syst., 2015
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015
Vericonn: a tool to generate efficient interconnection networks for post-silicon debug.
Proceedings of the 16th Latin-American Test Symposium, 2015
Proceedings of the Information Sciences and Systems 2015, 2015
Proceedings of the 2015 IEEE Frontiers in Education Conference, 2015
Hardware Architecture Benchmarking for Simulation of Human Immune System by Multi-agent Systems.
Proceedings of the Multi-Agent Systems and Agreement Technologies, 2015
2014
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014
2013
A just-in-time modulo scheduling for virtual coarse-grained reconfigurable architectures.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013
2012
Proceedings of the 13th Symposium on Computer Systems, 2012
Problem Oriented Approach to Hardware-Assisted Algorithm Design in C: A Case Study for Scheduling, Placement and Routing.
Proceedings of the 13th Symposium on Computer Systems, 2012
Proceedings of the 31st International Conference of the Chilean Computer Science Society, 2012
2011
Fast placement and routing by extending coarse-grained reconfigurable arrays with Omega Networks.
J. Syst. Archit., 2011
Proceedings of the 14th International Conference on Compilers, 2011
2010
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
2009
An implementation of the multi-geo routing protocol for wireless sensor networks using quadtrees.
Proceedings of the 6th ACM International Workshop on Performance Evaluation of Wireless Ad Hoc, 2009
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
On Simplifying Placement and Routing by Extending Coarse-Grained Reconfigurable Arrays with Omega Networks.
Proceedings of the Reconfigurable Computing: Architectures, 2009
2008
Reducing interconnection cost in coarse-grained dynamic computing through multistage network.
Proceedings of the FPL 2008, 2008
2007
A Polynomial Placement Algorithm for Data Driven Coarse-Grained Reconfigurable Architectures.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
2006
Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, 2006
2005
Proceedings of the Embedded Computer Systems: Architectures, 2005
Proceedings of the New Trends and Technologies in Computer-Aided Learning for Computer-Aided Design, 2005
2004
Proceedings of the Field Programmable Logic and Application, 2004