A new metaheuristc combining gradient models with NSGA-II to enhance analog IC synthesis. - Frederico Rocha; Nuno Lourenço 003; Ricardo Povoa; Ricardo Martins 003; Nuno Horta (IEEE Congress on Evolutionary Computation, 2013)

Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners. - Ricardo Povoa; Nuno Lourenço 003; Nuno Horta; Rui Santos-Tavares; João Goes (VLSI-SoC, 2013)

A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner. - Ricardo Povoa; Nuno Lourenço 003; Nuno Horta; Rui Santos-Tavares; João Goes (ICECS, 2014)

LC-VCO automatic synthesis using multi-objective evolutionary techniques. - Ricardo Povoa; Ricardo Lourenco; Nuno Lourenço 003; António Canelas; Ricardo Martins 003; Nuno Horta (ISCAS, 2014)

A voltage-combiners-biased amplifier with enhanced gain and speed using current starving. - Ricardo Povoa; Nuno Lourenço 003; Nuno Horta; João Goes (ISCAS, 2015)

Floorplan-aware analog IC sizing and optimization based on topological constraints. - Nuno Lourenço 003; António Canelas; Ricardo Povoa; Ricardo Martins 003; Nuno Horta (Integr., 2015)

Yield optimization using k-means clustering algorithm to reduce Monte Carlo simulations. - António Canelas; Ricardo Martins 003; Ricardo Povoa; Nuno Lourenço 003; Nuno Horta (SMACD, 2016)

AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation. - Nuno Lourenço 003; Ricardo Martins 003; António Canelas; Ricardo Povoa; Nuno Horta (Integr., 2016)

Current-flow and current-density-aware multi-objective optimization of analog IC placement. - Ricardo Martins 003; Ricardo Povoa; Nuno Lourenço 003; Nuno Horta (Integr., 2016)

Design and application of a CMOS active inductor at Ku band based on a multi-objective optimizer. - Mrinalinee Pandey; António Canelas; Ricardo Póvoa; Jorge Alves Torres; João Costa Freire; Nuno Lourenço 003; Nuno Horta (Integr., 2016)

Automatic synthesis of RF front-end blocks using multi-objective evolutionary techniques. - Ricardo Povoa; Ivan Bastos; Nuno Lourenço 003; Nuno Horta (Integr., 2016)

Efficient yield optimization method using a variable K-Means algorithm for analog IC sizing. - António Canelas; Ricardo Martins 003; Ricardo Povoa; Nuno Lourenço 003; Nuno Horta (DATE, 2017)

New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization. - Nuno C. Lourenço; Ricardo Martins 003; Ricardo Povoa; António Canelas; Nuno Horta; Fábio Passos; Rafael Castro-López; Elisenda Roca; Francisco V. Fernández 001 (SMACD, 2017)

Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks. - Ricardo Martins 003; Nuno C. Lourenço; Ricardo Povoa; António Canelas; Nuno Horta; Fábio Passos; Rafael Castro-López; Elisenda Roca; Francisco V. Fernández 001 (SMACD, 2017)

Systematic design of a voltage controlled oscillator using a layout-aware approach. - Fábio Passos; Elisenda Roca; Rafael Castro-López; Francisco V. Fernández 001; Ricardo Martins 003; Nuno C. Lourenço; Ricardo Povoa; António Canelas; Nuno C. G. Horta (SMACD, 2017)

Enhanced analog and RF IC sizing methodology using PCA and NSGA-II optimization kernel. - Tiago Pessoa; Nuno Lourenço 003; Ricardo Martins 003; Ricardo Povoa; Nuno Horta (DATE, 2018)

An Integrated LC Oscillator with Self Compensation for Frequency Drift and PVT Corners Variations. - Jigme Zangpo; Ricardo Povoa; Jorge Guilherme; Nuno Horta (ICECS, 2018)

On the Exploration of Promising Analog IC Designs via Artificial Neural Networks. - Nuno Lourenço 003; Joao Rosa; Ricardo Martins 003; Helena Aidos; António Canelas; Ricardo Povoa; Nuno Horta (SMACD, 2018)

A 20 DB Gain Two-Stage Low-Noise Amplifier with High Yield for 5 GHz Applications. - António Canelas; Ricardo Povoa; Ricardo M. F. Martins; Nuno Lourenço 003; Jorge Guilherme; Nuno Horta (SMACD, 2018)

Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs. - Fábio Passos; Ricardo Martins 003; Nuno C. Lourenço; Elisenda Roca; Rafael Castro-López; Ricardo Povoa; António Canelas; Nuno Horta; Francisco V. Fernández 001 (SMACD, 2018)

Second-order compensation BGR with low TC and high performance for space applications. - Jonathan Calvillo; Ricardo Póvoa; Jorge Guilherme; Nuno Horta (Integr., 2018)

Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology. - Fábio Passos; Ricardo Martins 003; Nuno Lourenço 003; Elisenda Roca; Ricardo Povoa; António Canelas; Rafael Castro-López; Nuno Horta; Francisco V. Fernández 001 (Integr., 2018)

Single-Stage Amplifier Biased by Voltage Combiners With Gain and Energy-Efficiency Enhancement. - Ricardo Povoa; Nuno Lourenço 003; Ricardo Martins 003; António Canelas; Nuno Cavaco Gomes Horta; João Goes (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving. - Ricardo Povoa; Nuno Lourenço 003; Ricardo Martins 003; António Canelas; Nuno Horta; João Goes (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Hard and Soft Constraints for Multi-objective Analog IC Sizing Optimization. - Nuno Lourenço 003; Ricardo Martins 003; António Canelas; Ricardo Póvoa; Nuno Horta; Emmanuel Moutaye (SMACD, 2019)

On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects. - Ricardo Martins 003; Nuno Lourenço 003; Ricardo Póvoa; Nuno Horta (SMACD, 2019)

Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC Sizing. - Nuno Lourenço 003; Engin Afacan; Ricardo Martins 003; Fábio Passos; António Canelas; Ricardo Póvoa; Nuno Horta; Günhan Dündar (SMACD, 2019)

Artificial Neural Networks as an Alternative for Automatic Analog IC Placement. - Daniel Guerra; António Canelas; Ricardo Póvoa; Nuno Horta; Nuno Lourenço 003; Ricardo Martins 003 (SMACD, 2019)

A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers. - Ricardo Póvoa; António Canelas; Ricardo Martins 003; Nuno Horta; Nuno Lourenço 003; João Goes (SMACD, 2019)

Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop. - Ricardo Martins 003; Nuno Lourenço 003; Fábio Passos; Ricardo Povoa; António Canelas; Elisenda Roca; Rafael Castro-López; Javier J. Sieiro; Francisco V. Fernández 001; Nuno Horta (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Semi-Supervised Artificial Neural Networks towards Analog IC Placement Recommender. - António Gusmão 001; Fábio Passos; Ricardo Póvoa; Nuno Horta; Nuno Lourenço 003; Ricardo Martins 003 (ISCAS, 2020)

A new family of CMOS inverter-based OTAs for biomedical and healthcare applications. - Ricardo Póvoa; António Canelas; Ricardo Martins 003; Nuno Horta; Nuno Lourenço 003; João Goes (Integr., 2020)

Sub-μW Tow-Thomas based biquad filter with improved gain for biomedical applications. - Ricardo Póvoa; Richa Arya; António Canelas; Fábio Passos; Ricardo Martins 003; Nuno Lourenço 003; Nuno Horta (Microelectron. J., 2020)

FUZYE: A Fuzzy c-Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms. - António Canelas; Ricardo Póvoa; Ricardo Martins 003; Nuno Lourenço 003; Jorge Guilherme; João Paulo Carvalho; Nuno Horta (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications. - Ricardo Póvoa; Nuno Lourenço 003; Ricardo Martins 003; António Canelas; Nuno Horta; João Goes (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Shortening the gap between pre- and post-layout analog IC performance by reducing the LDE-induced variations with multi-objective simulated quantum annealing. - Ricardo Martins 003; Nuno Lourenço 003; Ricardo Póvoa; Nuno Horta (Eng. Appl. Artif. Intell., 2021)

A Radiation-Hardened Frequency-Locked Loop On-Chip Oscillator with 33.6ppm/°C Stability for Space Applications. - Fábio Passos; Rafael Vieira; António Canelas; Ricardo Póvoa; Nuno Lourenço 003; Nuno Horta; Jorge Guilherme (ISCAS, 2022)

Radiation-Hardened Bandgap Voltage and Current Reference for Space Applications with 2.38 ppm/°C Temperature Coefficient. - Nuno Lourenço 003; Fábio Passos; Rafael Vieira; Ricardo Martins 003; Nuno Horta; Jorge Guilherme; Ricardo Póvoa (SMACD, 2022)

Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling. - Rafael Vieira; Fábio Passos; Ricardo Povoa; Ricardo Martins 003; Nuno Horta; Jorge Guilherme; Nuno Lourenço 003 (SMACD, 2022)

DeepPlacer: A custom integrated OpAmp placement tool using deep models. - António Gusmão 001; Ricardo Póvoa; Nuno Horta; Nuno Lourenço 003; Ricardo Martins 003 (Appl. Soft Comput., 2022)